commit a96056a6649e5df71d673e058aa559b80df273ec
author Chris Lattner <sabre@nondot.org> Sun Dec 30 20:49:49 2007 +0000
committer Chris Lattner <sabre@nondot.org> Sun Dec 30 20:49:49 2007 +0000
tree 87d9f35ded3a067f2d7aa4d17bfe0e362fb0f17d
parent 3a36a9e9c5f3a14eaa95e5c33e611eaed84203d4

Use MachineOperand::getImm instead of MachineOperand::getImmedValue.  Likewise setImmedValue -> setImm


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45453 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86IntelAsmPrinter.cpp

diff --git a/lib/Target/X86/X86IntelAsmPrinter.cpp b/lib/Target/X86/X86IntelAsmPrinter.cpp
index d784a56..8dae321 100644
--- a/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -99,7 +99,7 @@
 }
 
 void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
-  unsigned char value = MI->getOperand(Op).getImmedValue();
+  unsigned char value = MI->getOperand(Op).getImm();
   assert(value <= 7 && "Invalid ssecc argument!");
   switch (value) {
   case 0: O << "eq"; break;
@@ -132,7 +132,7 @@
     return;
   }
   case MachineOperand::MO_Immediate:
-    O << MO.getImmedValue();
+    O << MO.getImm();
     return;
   case MachineOperand::MO_MachineBasicBlock:
     printBasicBlockLabel(MO.getMachineBasicBlock());
@@ -195,7 +195,7 @@
   assert(isMem(MI, Op) && "Invalid memory reference!");
 
   const MachineOperand &BaseReg  = MI->getOperand(Op);
-  int ScaleVal                   = MI->getOperand(Op+1).getImmedValue();
+  int ScaleVal                   = MI->getOperand(Op+1).getImm();
   const MachineOperand &IndexReg = MI->getOperand(Op+2);
   const MachineOperand &DispSpec = MI->getOperand(Op+3);
 
@@ -220,7 +220,7 @@
       O << " + ";
     printOp(DispSpec, "mem");
   } else {
-    int DispVal = DispSpec.getImmedValue();
+    int DispVal = DispSpec.getImm();
     if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
       if (NeedPlus)
         if (DispVal > 0)