commit a96e577f53a934b91670b621ac48038653547d92
author Chris Lattner <sabre@nondot.org> Fri May 13 21:48:20 2005 +0000
committer Chris Lattner <sabre@nondot.org> Fri May 13 21:48:20 2005 +0000
tree 46ff815fd72fa2ba9fa29c1516a4649de46e1996
parent 3648c67eb260f9141b36571ed5435e4a78bd7c4f

Fix UnitTests/2005-05-13-SDivTwo.c


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21985 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelSimple.cpp

diff --git a/lib/Target/X86/X86ISelSimple.cpp b/lib/Target/X86/X86ISelSimple.cpp
index ea5520f..e5898a8 100644
--- a/lib/Target/X86/X86ISelSimple.cpp
+++ b/lib/Target/X86/X86ISelSimple.cpp
@@ -2924,7 +2924,7 @@
           .addReg(Op0Reg).addImm(Log-1);
         unsigned TmpReg2 = makeAnotherReg(Op0->getType());
         BuildMI(*BB, IP, SHROpcode[Class], 2, TmpReg2)
-          .addReg(TmpReg).addImm(32-Log);
+          .addReg(TmpReg).addImm(CI->getType()->getPrimitiveSizeInBits()-Log);
         unsigned TmpReg3 = makeAnotherReg(Op0->getType());
         BuildMI(*BB, IP, ADDOpcode[Class], 2, TmpReg3)
           .addReg(Op0Reg).addReg(TmpReg2);