Change macro names per naming standard in Makefile.rules.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@17361 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/projects/Stacker/samples/Makefile b/projects/Stacker/samples/Makefile
index d5b2780..e885eb9 100644
--- a/projects/Stacker/samples/Makefile
+++ b/projects/Stacker/samples/Makefile
@@ -20,12 +20,12 @@
ifdef OPTIMIZE
% : %.st
- @$(ECHO) "Compiling and Optimizing $(<F)"
- $(VERB)$(LLVMC_EXEC) -O3 $< -o $@
+ $(Echo) "Compiling and Optimizing $(<F)"
+ $(Verb)$(LLVMC_EXEC) -O3 $< -o $@
else
% : %.st
- @$(ECHO) "Compiling $(<F)"
- $(VERB)$(LLVMC_EXEC) $< -o $@
+ $(Echo) "Compiling $(<F)"
+ $(Verb)$(LLVMC_EXEC) $< -o $@
endif
SAMPLES_LL = $(SAMPLES:%=%.ll)
@@ -33,7 +33,7 @@
SAMPLES_S = $(SAMPLES:%=%.s)
clean ::
- $(VERB)rm -f gmon.out $(SAMPLES)
+ $(Verb)rm -f gmon.out $(SAMPLES)
#
# Include the Master Makefile that knows how to build all.
#