Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19243 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 82df28a..62b0289 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -74,6 +74,8 @@
bool isLoad;
bool isStore;
bool isTwoAddress;
+ bool isConvertibleToThreeAddress;
+ bool isCommutable;
bool isTerminator;
bool hasDelaySlot;
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index 3680f19..b9c8bdb 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -217,6 +217,8 @@
isLoad = R->getValueAsBit("isLoad");
isStore = R->getValueAsBit("isStore");
isTwoAddress = R->getValueAsBit("isTwoAddress");
+ isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress");
+ isCommutable = R->getValueAsBit("isCommutable");
isTerminator = R->getValueAsBit("isTerminator");
hasDelaySlot = R->getValueAsBit("hasDelaySlot");
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 69570bc..113bc98 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -116,6 +116,8 @@
if (Inst.isLoad) OS << "|M_LOAD_FLAG";
if (Inst.isStore) OS << "|M_STORE_FLAG";
if (Inst.isTwoAddress) OS << "|M_2_ADDR_FLAG";
+ if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR";
+ if (Inst.isCommutable) OS << "|M_COMMUTABLE";
if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG";
OS << ", 0";