diff --git a/lib/Analysis/InlineCost.cpp b/lib/Analysis/InlineCost.cpp
index 559f468..ee8370e 100644
--- a/lib/Analysis/InlineCost.cpp
+++ b/lib/Analysis/InlineCost.cpp
@@ -31,7 +31,7 @@
       // Eliminating a switch is a big win, proportional to the number of edges
       // deleted.
       Reduction += (SI->getNumSuccessors()-1) * 40;
-    else if (isa<IndBrInst>(*UI))
+    else if (isa<IndirectBrInst>(*UI))
       // Eliminating an indirect branch is a big win.
       Reduction += 200;
     else if (CallInst *CI = dyn_cast<CallInst>(*UI)) {
diff --git a/lib/Analysis/SparsePropagation.cpp b/lib/Analysis/SparsePropagation.cpp
index a10e7cb..d7bcac2 100644
--- a/lib/Analysis/SparsePropagation.cpp
+++ b/lib/Analysis/SparsePropagation.cpp
@@ -166,7 +166,7 @@
     return;
   }
   
-  if (isa<IndBrInst>(TI)) {
+  if (isa<IndirectBrInst>(TI)) {
     Succs.assign(Succs.size(), true);
     return;
   }
diff --git a/lib/AsmParser/LLLexer.cpp b/lib/AsmParser/LLLexer.cpp
index 1003907..f95110e 100644
--- a/lib/AsmParser/LLLexer.cpp
+++ b/lib/AsmParser/LLLexer.cpp
@@ -645,7 +645,7 @@
   INSTKEYWORD(ret,         Ret);
   INSTKEYWORD(br,          Br);
   INSTKEYWORD(switch,      Switch);
-  INSTKEYWORD(indbr,       IndBr);
+  INSTKEYWORD(indirectbr,  IndirectBr);
   INSTKEYWORD(invoke,      Invoke);
   INSTKEYWORD(unwind,      Unwind);
   INSTKEYWORD(unreachable, Unreachable);
diff --git a/lib/AsmParser/LLParser.cpp b/lib/AsmParser/LLParser.cpp
index cf16e42..aba0264 100644
--- a/lib/AsmParser/LLParser.cpp
+++ b/lib/AsmParser/LLParser.cpp
@@ -2731,7 +2731,7 @@
   case lltok::kw_ret:         return ParseRet(Inst, BB, PFS);
   case lltok::kw_br:          return ParseBr(Inst, PFS);
   case lltok::kw_switch:      return ParseSwitch(Inst, PFS);
-  case lltok::kw_indbr:       return ParseIndBr(Inst, PFS);
+  case lltok::kw_indirectbr:  return ParseIndirectBr(Inst, PFS);
   case lltok::kw_invoke:      return ParseInvoke(Inst, PFS);
   // Binary Operators.
   case lltok::kw_add:
@@ -3004,19 +3004,19 @@
   return false;
 }
 
-/// ParseIndBr
+/// ParseIndirectBr
 ///  Instruction
-///    ::= 'indbr' TypeAndValue ',' '[' LabelList ']'
-bool LLParser::ParseIndBr(Instruction *&Inst, PerFunctionState &PFS) {
+///    ::= 'indirectbr' TypeAndValue ',' '[' LabelList ']'
+bool LLParser::ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS) {
   LocTy AddrLoc;
   Value *Address;
   if (ParseTypeAndValue(Address, AddrLoc, PFS) ||
-      ParseToken(lltok::comma, "expected ',' after indbr address") ||
-      ParseToken(lltok::lsquare, "expected '[' with indbr"))
+      ParseToken(lltok::comma, "expected ',' after indirectbr address") ||
+      ParseToken(lltok::lsquare, "expected '[' with indirectbr"))
     return true;
   
   if (!isa<PointerType>(Address->getType()))
-    return Error(AddrLoc, "indbr address must have pointer type");
+    return Error(AddrLoc, "indirectbr address must have pointer type");
   
   // Parse the destination list.
   SmallVector<BasicBlock*, 16> DestList;
@@ -3037,7 +3037,7 @@
   if (ParseToken(lltok::rsquare, "expected ']' at end of block list"))
     return true;
 
-  IndBrInst *IBI = IndBrInst::Create(Address, DestList.size());
+  IndirectBrInst *IBI = IndirectBrInst::Create(Address, DestList.size());
   for (unsigned i = 0, e = DestList.size(); i != e; ++i)
     IBI->addDestination(DestList[i]);
   Inst = IBI;
diff --git a/lib/AsmParser/LLParser.h b/lib/AsmParser/LLParser.h
index 37473a0..ca2e2b6 100644
--- a/lib/AsmParser/LLParser.h
+++ b/lib/AsmParser/LLParser.h
@@ -270,7 +270,7 @@
     bool ParseRet(Instruction *&Inst, BasicBlock *BB, PerFunctionState &PFS);
     bool ParseBr(Instruction *&Inst, PerFunctionState &PFS);
     bool ParseSwitch(Instruction *&Inst, PerFunctionState &PFS);
-    bool ParseIndBr(Instruction *&Inst, PerFunctionState &PFS);
+    bool ParseIndirectBr(Instruction *&Inst, PerFunctionState &PFS);
     bool ParseInvoke(Instruction *&Inst, PerFunctionState &PFS);
 
     bool ParseArithmetic(Instruction *&I, PerFunctionState &PFS, unsigned Opc,
diff --git a/lib/AsmParser/LLToken.h b/lib/AsmParser/LLToken.h
index a25b6f0..d6efaf4 100644
--- a/lib/AsmParser/LLToken.h
+++ b/lib/AsmParser/LLToken.h
@@ -111,7 +111,8 @@
     kw_fptoui, kw_fptosi, kw_inttoptr, kw_ptrtoint, kw_bitcast,
     kw_select, kw_va_arg,
 
-    kw_ret, kw_br, kw_switch, kw_indbr, kw_invoke, kw_unwind, kw_unreachable,
+    kw_ret, kw_br, kw_switch, kw_indirectbr, kw_invoke, kw_unwind,
+    kw_unreachable,
 
     kw_malloc, kw_alloca, kw_free, kw_load, kw_store, kw_getelementptr,
 
diff --git a/lib/Bitcode/Reader/BitcodeReader.cpp b/lib/Bitcode/Reader/BitcodeReader.cpp
index 41803c0..1326b68 100644
--- a/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -1975,22 +1975,22 @@
       I = SI;
       break;
     }
-    case bitc::FUNC_CODE_INST_INDBR: { // INDBR: [opty, op0, op1, ...]
+    case bitc::FUNC_CODE_INST_INDIRECTBR: { // INDIRECTBR: [opty, op0, op1, ...]
       if (Record.size() < 2)
-        return Error("Invalid INDBR record");
+        return Error("Invalid INDIRECTBR record");
       const Type *OpTy = getTypeByID(Record[0]);
       Value *Address = getFnValueByID(Record[1], OpTy);
       if (OpTy == 0 || Address == 0)
-        return Error("Invalid INDBR record");
+        return Error("Invalid INDIRECTBR record");
       unsigned NumDests = Record.size()-2;
-      IndBrInst *IBI = IndBrInst::Create(Address, NumDests);
+      IndirectBrInst *IBI = IndirectBrInst::Create(Address, NumDests);
       InstructionList.push_back(IBI);
       for (unsigned i = 0, e = NumDests; i != e; ++i) {
         if (BasicBlock *DestBB = getBasicBlock(Record[2+i])) {
           IBI->addDestination(DestBB);
         } else {
           delete IBI;
-          return Error("Invalid INDBR record!");
+          return Error("Invalid INDIRECTBR record!");
         }
       }
       I = IBI;
diff --git a/lib/Bitcode/Writer/BitcodeWriter.cpp b/lib/Bitcode/Writer/BitcodeWriter.cpp
index c0f97c1..692c289 100644
--- a/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -1015,8 +1015,8 @@
     for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
       Vals.push_back(VE.getValueID(I.getOperand(i)));
     break;
-  case Instruction::IndBr:
-    Code = bitc::FUNC_CODE_INST_INDBR;
+  case Instruction::IndirectBr:
+    Code = bitc::FUNC_CODE_INST_INDIRECTBR;
     Vals.push_back(VE.getTypeID(I.getOperand(0)->getType()));
     for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i)
       Vals.push_back(VE.getValueID(I.getOperand(i)));
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index fe95c75..f86e584 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -2131,7 +2131,7 @@
   }
 }
 
-void SelectionDAGLowering::visitIndBr(IndBrInst &I) {
+void SelectionDAGLowering::visitIndirectBr(IndirectBrInst &I) {
   // Update machine-CFG edges.
   for (unsigned i = 0, e = I.getNumSuccessors(); i != e; ++i)
     CurMBB->addSuccessor(FuncInfo.MBBMap[I.getSuccessor(i)]);
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
index 9aca707..a0ec7aa 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.h
@@ -49,7 +49,7 @@
 class GCFunctionInfo;
 class ICmpInst;
 class IntToPtrInst;
-class IndBrInst;
+class IndirectBrInst;
 class InvokeInst;
 class InsertElementInst;
 class InsertValueInst;
@@ -449,7 +449,7 @@
   void visitRet(ReturnInst &I);
   void visitBr(BranchInst &I);
   void visitSwitch(SwitchInst &I);
-  void visitIndBr(IndBrInst &I);
+  void visitIndirectBr(IndirectBrInst &I);
   void visitUnreachable(UnreachableInst &I) { /* noop */ }
 
   // Helpers for visitSwitch
diff --git a/lib/Target/CBackend/CBackend.cpp b/lib/Target/CBackend/CBackend.cpp
index dae830d..9e4fe27 100644
--- a/lib/Target/CBackend/CBackend.cpp
+++ b/lib/Target/CBackend/CBackend.cpp
@@ -282,7 +282,7 @@
     void visitReturnInst(ReturnInst &I);
     void visitBranchInst(BranchInst &I);
     void visitSwitchInst(SwitchInst &I);
-    void visitIndBrInst(IndBrInst &I);
+    void visitIndirectBrInst(IndirectBrInst &I);
     void visitInvokeInst(InvokeInst &I) {
       llvm_unreachable("Lowerinvoke pass didn't work!");
     }
@@ -2579,7 +2579,7 @@
   Out << "  }\n";
 }
 
-void CWriter::visitIndBrInst(IndBrInst &IBI) {
+void CWriter::visitIndirectBrInst(IndirectBrInst &IBI) {
   Out << "  goto *(void*)(";
   writeOperand(IBI.getOperand(0));
   Out << ");\n";
diff --git a/lib/Target/CppBackend/CPPBackend.cpp b/lib/Target/CppBackend/CPPBackend.cpp
index 171c642..4bae6c7 100644
--- a/lib/Target/CppBackend/CPPBackend.cpp
+++ b/lib/Target/CppBackend/CPPBackend.cpp
@@ -1132,9 +1132,9 @@
       }
       break;
     }
-    case Instruction::IndBr: {
-      const IndBrInst *IBI = cast<IndBrInst>(I);
-      Out << "IndBrInst *" << iName << " = IndBrInst::Create("
+    case Instruction::IndirectBr: {
+      const IndirectBrInst *IBI = cast<IndirectBrInst>(I);
+      Out << "IndirectBrInst *" << iName << " = IndirectBrInst::Create("
           << opNames[0] << ", " << IBI->getNumDestinations() << ");";
       nl(Out);
       for (unsigned i = 1; i != IBI->getNumOperands(); ++i) {
diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp
index 5a92432..296cc25 100644
--- a/lib/VMCore/AsmWriter.cpp
+++ b/lib/VMCore/AsmWriter.cpp
@@ -1846,8 +1846,8 @@
       writeOperand(I.getOperand(op+1), true);
     }
     Out << "\n  ]";
-  } else if (isa<IndBrInst>(I)) {
-    // Special case indbr instruction to get formatting nice and correct.
+  } else if (isa<IndirectBrInst>(I)) {
+    // Special case indirectbr instruction to get formatting nice and correct.
     Out << ' ';
     writeOperand(Operand, true);
     Out << ", ";
diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp
index c48e75c..879c073 100644
--- a/lib/VMCore/Instruction.cpp
+++ b/lib/VMCore/Instruction.cpp
@@ -103,7 +103,7 @@
   case Ret:    return "ret";
   case Br:     return "br";
   case Switch: return "switch";
-  case IndBr:  return "indbr";
+  case IndirectBr: return "indirectbr";
   case Invoke: return "invoke";
   case Unwind: return "unwind";
   case Unreachable: return "unreachable";
diff --git a/lib/VMCore/Instructions.cpp b/lib/VMCore/Instructions.cpp
index 5a6d376..1e63436 100644
--- a/lib/VMCore/Instructions.cpp
+++ b/lib/VMCore/Instructions.cpp
@@ -3090,7 +3090,7 @@
 //                        SwitchInst Implementation
 //===----------------------------------------------------------------------===//
 
-void IndBrInst::init(Value *Address, unsigned NumDests) {
+void IndirectBrInst::init(Value *Address, unsigned NumDests) {
   assert(Address);
   ReservedSpace = 1+NumDests;
   NumOperands = 1;
@@ -3107,7 +3107,7 @@
 ///   2. If NumOps > NumOperands, reserve space for NumOps operands.
 ///   3. If NumOps == NumOperands, trim the reserved space.
 ///
-void IndBrInst::resizeOperands(unsigned NumOps) {
+void IndirectBrInst::resizeOperands(unsigned NumOps) {
   unsigned e = getNumOperands();
   if (NumOps == 0) {
     NumOps = e*2;
@@ -3129,21 +3129,22 @@
   if (OldOps) Use::zap(OldOps, OldOps + e, true);
 }
 
-IndBrInst::IndBrInst(Value *Address, unsigned NumCases,
-                     Instruction *InsertBefore)
-: TerminatorInst(Type::getVoidTy(Address->getContext()), Instruction::IndBr,
+IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases,
+                               Instruction *InsertBefore)
+: TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr,
                  0, 0, InsertBefore) {
   init(Address, NumCases);
 }
 
-IndBrInst::IndBrInst(Value *Address, unsigned NumCases, BasicBlock *InsertAtEnd)
-: TerminatorInst(Type::getVoidTy(Address->getContext()), Instruction::IndBr,
+IndirectBrInst::IndirectBrInst(Value *Address, unsigned NumCases,
+                               BasicBlock *InsertAtEnd)
+: TerminatorInst(Type::getVoidTy(Address->getContext()),Instruction::IndirectBr,
                  0, 0, InsertAtEnd) {
   init(Address, NumCases);
 }
 
-IndBrInst::IndBrInst(const IndBrInst &IBI)
-  : TerminatorInst(Type::getVoidTy(IBI.getContext()), Instruction::IndBr,
+IndirectBrInst::IndirectBrInst(const IndirectBrInst &IBI)
+  : TerminatorInst(Type::getVoidTy(IBI.getContext()), Instruction::IndirectBr,
                    allocHungoffUses(IBI.getNumOperands()),
                    IBI.getNumOperands()) {
   Use *OL = OperandList, *InOL = IBI.OperandList;
@@ -3152,13 +3153,13 @@
   SubclassOptionalData = IBI.SubclassOptionalData;
 }
 
-IndBrInst::~IndBrInst() {
+IndirectBrInst::~IndirectBrInst() {
   dropHungoffUses(OperandList);
 }
 
 /// addDestination - Add a destination.
 ///
-void IndBrInst::addDestination(BasicBlock *DestBB) {
+void IndirectBrInst::addDestination(BasicBlock *DestBB) {
   unsigned OpNo = NumOperands;
   if (OpNo+1 > ReservedSpace)
     resizeOperands(0);  // Get more space!
@@ -3169,8 +3170,8 @@
 }
 
 /// removeDestination - This method removes the specified successor from the
-/// indbr instruction.
-void IndBrInst::removeDestination(unsigned idx) {
+/// indirectbr instruction.
+void IndirectBrInst::removeDestination(unsigned idx) {
   assert(idx < getNumOperands()-1 && "Successor index out of range!");
   
   unsigned NumOps = getNumOperands();
@@ -3184,13 +3185,13 @@
   NumOperands = NumOps-1;
 }
 
-BasicBlock *IndBrInst::getSuccessorV(unsigned idx) const {
+BasicBlock *IndirectBrInst::getSuccessorV(unsigned idx) const {
   return getSuccessor(idx);
 }
-unsigned IndBrInst::getNumSuccessorsV() const {
+unsigned IndirectBrInst::getNumSuccessorsV() const {
   return getNumSuccessors();
 }
-void IndBrInst::setSuccessorV(unsigned idx, BasicBlock *B) {
+void IndirectBrInst::setSuccessorV(unsigned idx, BasicBlock *B) {
   setSuccessor(idx, B);
 }
 
@@ -3335,8 +3336,8 @@
   return new SwitchInst(*this);
 }
 
-IndBrInst *IndBrInst::clone_impl() const {
-  return new IndBrInst(*this);
+IndirectBrInst *IndirectBrInst::clone_impl() const {
+  return new IndirectBrInst(*this);
 }