Do away with CPU feature list. Just use CPUID to detect MMX, SSE, SSE2, SSE3, and 64-bit support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30763 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h
index 6e0d1db..e781d95 100644
--- a/lib/Target/X86/X86Subtarget.h
+++ b/lib/Target/X86/X86Subtarget.h
@@ -32,19 +32,12 @@
NoMMXSSE, MMX, SSE1, SSE2, SSE3
};
- enum X863DNowEnum {
- NoThreeDNow, ThreeDNow, ThreeDNowA
- };
-
/// AsmFlavor - Which x86 asm dialect to use.
AsmWriterFlavorTy AsmFlavor;
/// X86SSELevel - MMX, SSE1, SSE2, SSE3, or none supported.
X86SSEEnum X86SSELevel;
- /// X863DNowLevel - 3DNow or 3DNow Athlon, or none supported.
- X863DNowEnum X863DNowLevel;
-
/// HasX86_64 - True if the processor supports X86-64 instructions.
bool HasX86_64;
@@ -81,9 +74,9 @@
/// aligned.
unsigned getMinRepStrSizeThreshold() const { return MinRepStrSizeThreshold; }
- /// ParseSubtargetFeatures - Parses features string setting specified
- /// subtarget options. Definition of function is auto generated by tblgen.
- void ParseSubtargetFeatures(const std::string &FS, const std::string &CPU);
+ /// DetectSubtargetFeatures - Auto-detect CPU features using CPUID instruction.
+ ///
+ void DetectSubtargetFeatures();
bool is64Bit() const { return Is64Bit; }
@@ -91,8 +84,6 @@
bool hasSSE1() const { return X86SSELevel >= SSE1; }
bool hasSSE2() const { return X86SSELevel >= SSE2; }
bool hasSSE3() const { return X86SSELevel >= SSE3; }
- bool has3DNow() const { return X863DNowLevel >= ThreeDNow; }
- bool has3DNowA() const { return X863DNowLevel >= ThreeDNowA; }
bool isFlavorAtt() const { return AsmFlavor == att; }
bool isFlavorIntel() const { return AsmFlavor == intel; }