Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the W
bit should be set to 0 instead of 1.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97481 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index cd9c2cc..cd295d2 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -1260,7 +1260,7 @@
"strd", "\t$src1, $src2, [$base], $offset",
"$base = $base_wb", []>;
-// STRT and STRBT are for disassembly only.
+// STRT, STRBT, and STRHT are for disassembly only.
def STRT : AI2stwpo<(outs GPR:$base_wb),
(ins GPR:$src, GPR:$base,am2offset:$offset),
@@ -1278,6 +1278,14 @@
let Inst{21} = 1; // overwrite
}
+def STRHT: AI3sthpo<(outs GPR:$base_wb),
+ (ins GPR:$src, GPR:$base,am3offset:$offset),
+ StMiscFrm, IIC_iStoreru,
+ "strht", "\t$src, [$base], $offset", "$base = $base_wb",
+ [/* For disassembly only; pattern left blank */]> {
+ let Inst{21} = 1; // overwrite
+}
+
//===----------------------------------------------------------------------===//
// Load / store multiple Instructions.
//