commit ada779fb11eb411536aa8219a176ca0ce4d58fd1
author Christopher Lamb <christopher.lamb@gmail.com> Fri Jul 27 07:36:14 2007 +0000
committer Christopher Lamb <christopher.lamb@gmail.com> Fri Jul 27 07:36:14 2007 +0000
tree b289127f3dbd55e3448aaf51b0b610983c7553b6
parent 3e22947d9acef08486c59349702cfb77ef734fbf

Move subreg lowering pass to be right after regalloc, per feedback.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40548 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 4620abb..526c525 100644
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -72,6 +72,11 @@
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -96,8 +101,6 @@
 
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
-    
-  PM.add(createLowerSubregsPass());
 
   switch (FileType) {
   default:
@@ -178,6 +181,11 @@
   
   if (PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
+    
+  PM.add(createLowerSubregsPass());
+  
+  if (PrintMachineCode)  // Print the subreg lowered code
+    PM.add(createMachineFunctionPrinterPass(cerr));
 
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
@@ -199,8 +207,6 @@
   
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
     PM.add(createMachineFunctionPrinterPass(cerr));
-    
-  PM.add(createLowerSubregsPass());
 
   addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);