expose DWARF_LABEL opcode# so the branch folder can update debug info properly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31024 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 7941170..e74cb13 100644
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -219,6 +219,13 @@
return get(Opcode).Flags & M_VARIABLE_OPS;
}
+ /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+ /// instruction if it has one. This is used by codegen passes that update
+ /// DWARF line number info as they modify the code.
+ virtual unsigned getDWARF_LABELOpcode() const {
+ return 0;
+ }
+
/// Return true if the instruction is a register to register move
/// and leave the source and dest operands in the passed parameters.
virtual bool isMoveInstr(const MachineInstr& MI,
diff --git a/lib/Target/PowerPC/PPCInstrInfo.h b/lib/Target/PowerPC/PPCInstrInfo.h
index 265e1e7..dc16aed 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.h
+++ b/lib/Target/PowerPC/PPCInstrInfo.h
@@ -77,6 +77,13 @@
/// This is used for addressing modes.
virtual const TargetRegisterClass *getPointerRegClass() const;
+ /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+ /// instruction if it has one. This is used by codegen passes that update
+ /// DWARF line number info as they modify the code.
+ virtual unsigned getDWARF_LABELOpcode() const {
+ return PPC::DWARF_LABEL;
+ }
+
// Return true if the instruction is a register to register move and
// leave the source and dest operands in the passed parameters.
//
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 939b869..6532161 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -25,6 +25,13 @@
TM(tm), RI(tm, *this) {
}
+/// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+/// instruction if it has one. This is used by codegen passes that update
+/// DWARF line number info as they modify the code.
+unsigned X86InstrInfo::getDWARF_LABELOpcode() const {
+ return X86::DWARF_LABEL;
+}
+
bool X86InstrInfo::isMoveInstr(const MachineInstr& MI,
unsigned& sourceReg,
diff --git a/lib/Target/X86/X86InstrInfo.h b/lib/Target/X86/X86InstrInfo.h
index 3e0694f..4ceb98d1 100644
--- a/lib/Target/X86/X86InstrInfo.h
+++ b/lib/Target/X86/X86InstrInfo.h
@@ -205,6 +205,11 @@
unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const;
unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const;
+ /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL
+ /// instruction if it has one. This is used by codegen passes that update
+ /// DWARF line number info as they modify the code.
+ virtual unsigned getDWARF_LABELOpcode() const;
+
/// convertToThreeAddress - This method must be implemented by targets that
/// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target
/// may be able to convert a two-address instruction into a true