create the raddr addressing mode that matches any register and the frame index
use raddr for the ldr instruction. This removes a dummy mov from the assembly output
remove SelectFrameIndex
remove isLoadFromStackSlot
remove isStoreToStackSlot
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29079 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 413ca59..33413d6 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -95,8 +95,7 @@
// If the argument is actually used, emit a load from the right stack
// slot.
if (!Op.Val->hasNUsesOfValue(0, ArgNo)) {
- //hack
- unsigned ArgOffset = 0;
+ unsigned ArgOffset = (ArgNo - num_regs) * 4;
MachineFrameInfo *MFI = MF.getFrameInfo();
unsigned ObjSize = MVT::getSizeInBits(ObjectVT)/8;
@@ -165,6 +164,7 @@
void Select(SDOperand &Result, SDOperand Op);
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
+ bool SelectAddrReg(SDOperand N, SDOperand &Base);
// Include the pieces autogenerated from the target description.
#include "ARMGenDAGISel.inc"
@@ -183,12 +183,13 @@
ScheduleAndEmitDAG(DAG);
}
-static void SelectFrameIndex(SelectionDAG *CurDAG, SDOperand &Result, SDNode *N, SDOperand Op) {
- int FI = cast<FrameIndexSDNode>(N)->getIndex();
-
- SDOperand TFI = CurDAG->getTargetFrameIndex(FI, Op.getValueType());
-
- Result = CurDAG->SelectNodeTo(N, ARM::movri, Op.getValueType(), TFI);
+bool ARMDAGToDAGISel::SelectAddrReg(SDOperand N, SDOperand &Base) {
+ if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N)) {
+ Base = CurDAG->getTargetFrameIndex(FI->getIndex(), N.getValueType());
+ }
+ else
+ Base = N;
+ return true; //any address fits in a register
}
void ARMDAGToDAGISel::Select(SDOperand &Result, SDOperand Op) {
@@ -198,10 +199,6 @@
default:
SelectCode(Result, Op);
break;
-
- case ISD::FrameIndex:
- SelectFrameIndex(CurDAG, Result, N, Op);
- break;
}
}