Use vAny type to get rid of Neon intrinsics that differed only in whether
the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.
If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78646 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/ARM/vst1.ll b/test/CodeGen/ARM/vst1.ll
index d84f758..8fbae12 100644
--- a/test/CodeGen/ARM/vst1.ll
+++ b/test/CodeGen/ARM/vst1.ll
@@ -4,7 +4,7 @@
;CHECK: vst1i8:
;CHECK: vst1.8
%tmp1 = load <8 x i8>* %B
- call void @llvm.arm.neon.vst1i.v8i8(i8* %A, <8 x i8> %tmp1)
+ call void @llvm.arm.neon.vst1.v8i8(i8* %A, <8 x i8> %tmp1)
ret void
}
@@ -12,7 +12,7 @@
;CHECK: vst1i16:
;CHECK: vst1.16
%tmp1 = load <4 x i16>* %B
- call void @llvm.arm.neon.vst1i.v4i16(i16* %A, <4 x i16> %tmp1)
+ call void @llvm.arm.neon.vst1.v4i16(i16* %A, <4 x i16> %tmp1)
ret void
}
@@ -20,7 +20,7 @@
;CHECK: vst1i32:
;CHECK: vst1.32
%tmp1 = load <2 x i32>* %B
- call void @llvm.arm.neon.vst1i.v2i32(i32* %A, <2 x i32> %tmp1)
+ call void @llvm.arm.neon.vst1.v2i32(i32* %A, <2 x i32> %tmp1)
ret void
}
@@ -28,7 +28,7 @@
;CHECK: vst1f:
;CHECK: vst1.32
%tmp1 = load <2 x float>* %B
- call void @llvm.arm.neon.vst1f.v2f32(float* %A, <2 x float> %tmp1)
+ call void @llvm.arm.neon.vst1.v2f32(float* %A, <2 x float> %tmp1)
ret void
}
@@ -36,7 +36,7 @@
;CHECK: vst1i64:
;CHECK: vst1.64
%tmp1 = load <1 x i64>* %B
- call void @llvm.arm.neon.vst1i.v1i64(i64* %A, <1 x i64> %tmp1)
+ call void @llvm.arm.neon.vst1.v1i64(i64* %A, <1 x i64> %tmp1)
ret void
}
@@ -44,7 +44,7 @@
;CHECK: vst1Qi8:
;CHECK: vst1.8
%tmp1 = load <16 x i8>* %B
- call void @llvm.arm.neon.vst1i.v16i8(i8* %A, <16 x i8> %tmp1)
+ call void @llvm.arm.neon.vst1.v16i8(i8* %A, <16 x i8> %tmp1)
ret void
}
@@ -52,7 +52,7 @@
;CHECK: vst1Qi16:
;CHECK: vst1.16
%tmp1 = load <8 x i16>* %B
- call void @llvm.arm.neon.vst1i.v8i16(i16* %A, <8 x i16> %tmp1)
+ call void @llvm.arm.neon.vst1.v8i16(i16* %A, <8 x i16> %tmp1)
ret void
}
@@ -60,7 +60,7 @@
;CHECK: vst1Qi32:
;CHECK: vst1.32
%tmp1 = load <4 x i32>* %B
- call void @llvm.arm.neon.vst1i.v4i32(i32* %A, <4 x i32> %tmp1)
+ call void @llvm.arm.neon.vst1.v4i32(i32* %A, <4 x i32> %tmp1)
ret void
}
@@ -68,7 +68,7 @@
;CHECK: vst1Qf:
;CHECK: vst1.32
%tmp1 = load <4 x float>* %B
- call void @llvm.arm.neon.vst1f.v4f32(float* %A, <4 x float> %tmp1)
+ call void @llvm.arm.neon.vst1.v4f32(float* %A, <4 x float> %tmp1)
ret void
}
@@ -76,18 +76,18 @@
;CHECK: vst1Qi64:
;CHECK: vst1.64
%tmp1 = load <2 x i64>* %B
- call void @llvm.arm.neon.vst1i.v2i64(i64* %A, <2 x i64> %tmp1)
+ call void @llvm.arm.neon.vst1.v2i64(i64* %A, <2 x i64> %tmp1)
ret void
}
-declare void @llvm.arm.neon.vst1i.v8i8(i8*, <8 x i8>) nounwind
-declare void @llvm.arm.neon.vst1i.v4i16(i8*, <4 x i16>) nounwind
-declare void @llvm.arm.neon.vst1i.v2i32(i8*, <2 x i32>) nounwind
-declare void @llvm.arm.neon.vst1f.v2f32(i8*, <2 x float>) nounwind
-declare void @llvm.arm.neon.vst1i.v1i64(i8*, <1 x i64>) nounwind
+declare void @llvm.arm.neon.vst1.v8i8(i8*, <8 x i8>) nounwind
+declare void @llvm.arm.neon.vst1.v4i16(i8*, <4 x i16>) nounwind
+declare void @llvm.arm.neon.vst1.v2i32(i8*, <2 x i32>) nounwind
+declare void @llvm.arm.neon.vst1.v2f32(i8*, <2 x float>) nounwind
+declare void @llvm.arm.neon.vst1.v1i64(i8*, <1 x i64>) nounwind
-declare void @llvm.arm.neon.vst1i.v16i8(i8*, <16 x i8>) nounwind
-declare void @llvm.arm.neon.vst1i.v8i16(i8*, <8 x i16>) nounwind
-declare void @llvm.arm.neon.vst1i.v4i32(i8*, <4 x i32>) nounwind
-declare void @llvm.arm.neon.vst1f.v4f32(i8*, <4 x float>) nounwind
-declare void @llvm.arm.neon.vst1i.v2i64(i8*, <2 x i64>) nounwind
+declare void @llvm.arm.neon.vst1.v16i8(i8*, <16 x i8>) nounwind
+declare void @llvm.arm.neon.vst1.v8i16(i8*, <8 x i16>) nounwind
+declare void @llvm.arm.neon.vst1.v4i32(i8*, <4 x i32>) nounwind
+declare void @llvm.arm.neon.vst1.v4f32(i8*, <4 x float>) nounwind
+declare void @llvm.arm.neon.vst1.v2i64(i8*, <2 x i64>) nounwind