Make a new llvm/Target #include directory.
Move files from lib/CodeGen/TargetMachine to lib/Target
Move TargetData.h and TargetMachine.h to Target/{Data.h|Machine.h}
Prepare to split TargetMachine.h into several smaller files
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@566 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
index 2358687..0987572 100644
--- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
+++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp
@@ -12,7 +12,7 @@
#include "llvm/CodeGen/InstrScheduling.h"
#include "llvm/CodeGen/SchedPriorities.h"
#include "llvm/Analysis/LiveVar/BBLiveVar.h"
-#include "llvm/CodeGen/TargetMachine.h"
+#include "llvm/Target/Machine.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Instruction.h"
diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp
index 05109cb..3c819f6 100644
--- a/lib/Target/SparcV9/InstrSched/SchedGraph.cpp
+++ b/lib/Target/SparcV9/InstrSched/SchedGraph.cpp
@@ -18,7 +18,7 @@
#include "llvm/Method.h"
#include "llvm/CodeGen/SchedGraph.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/TargetMachine.h"
+#include "llvm/Target/Machine.h"
#include "llvm/Support/StringExtras.h"
#include <algorithm>
diff --git a/lib/Target/SparcV9/RegAlloc/RegClass.h b/lib/Target/SparcV9/RegAlloc/RegClass.h
index 1d08502..efe1746 100644
--- a/lib/Target/SparcV9/RegAlloc/RegClass.h
+++ b/lib/Target/SparcV9/RegAlloc/RegClass.h
@@ -16,19 +16,14 @@
*/
-
-
#ifndef REG_CLASS_H
#define REG_CLASS_H
#include "llvm/CodeGen/IGNode.h"
#include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/CodeGen/TargetMachine.h"
-
-
+#include "llvm/Target/Machine.h"
#include <stack>
-
typedef vector<unsigned int> ReservedColorListType;
diff --git a/lib/Target/SparcV9/SparcV9Internals.h b/lib/Target/SparcV9/SparcV9Internals.h
index 606966d..f9a344b 100644
--- a/lib/Target/SparcV9/SparcV9Internals.h
+++ b/lib/Target/SparcV9/SparcV9Internals.h
@@ -8,7 +8,7 @@
#ifndef SPARC_INTERNALS_H
#define SPARC_INTERNALS_H
-#include "llvm/CodeGen/TargetMachine.h"
+#include "llvm/Target/Machine.h"
#include "SparcRegInfo.h"
#include <sys/types.h>
diff --git a/lib/Target/SparcV9/SparcV9RegInfo.h b/lib/Target/SparcV9/SparcV9RegInfo.h
index 41a6d00..3ebef55 100644
--- a/lib/Target/SparcV9/SparcV9RegInfo.h
+++ b/lib/Target/SparcV9/SparcV9RegInfo.h
@@ -4,19 +4,17 @@
Purpose: Contains the description of integer register class of Sparc
*/
-
#ifndef SPARC_INT_REG_CLASS_H
#define SPARC_INT_REG_CLASS_H
-#include "llvm/CodeGen/TargetMachine.h"
+#include "llvm/Target/Machine.h"
//-----------------------------------------------------------------------------
// Integer Register Class
//-----------------------------------------------------------------------------
-
// Int register names in same order as enum in class SparcIntRegOrder
-
+//
static string const IntRegNames[] =
{ "g1", "g2", "g3", "g4", "g5", "g6", "g7",
"o0", "o1", "o2", "o3", "o4", "o5", "o7",