commit b3d91cfa10387517c305f75a8220d192f7d133cb
author Evan Cheng <evan.cheng@apple.com> Wed Sep 26 06:25:56 2007 +0000
committer Evan Cheng <evan.cheng@apple.com> Wed Sep 26 06:25:56 2007 +0000
tree ff8e23600c1a2e9ba48a6010a2ec8a84c84f785b
parent a0b5b7dd0099478f943ffc80bf92b161e7440ba0

Allow copyRegToReg to emit cross register classes copies.
Tested with "make check"!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42346 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/ScheduleDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index b775122..a6e32b2 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -365,7 +365,7 @@
   } else {
     // Create the reg, emit the copy.
     VRBase = RegMap->createVirtualRegister(TRC);
-    MRI->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC);
+    MRI->copyRegToReg(*BB, BB->end(), VRBase, SrcReg, TRC, TRC);
   }
 
   if (InstanceNo > 0)
@@ -769,7 +769,7 @@
           TRC = getPhysicalRegisterRegClass(MRI,
                                             Node->getOperand(2).getValueType(),
                                             InReg);
-        MRI->copyRegToReg(*BB, BB->end(), DestReg, InReg, TRC);
+        MRI->copyRegToReg(*BB, BB->end(), DestReg, InReg, TRC, TRC);
       }
       break;
     }
@@ -854,9 +854,11 @@
   if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) {
     for (MachineFunction::livein_iterator LI = MF.livein_begin(),
          E = MF.livein_end(); LI != E; ++LI)
-      if (LI->second)
+      if (LI->second) {
+        const TargetRegisterClass *RC = RegMap->getRegClass(LI->second);
         MRI->copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
-                          LI->first, RegMap->getRegClass(LI->second));
+                          LI->first, RC, RC);
+      }
   }
   
   

lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
index 286ef1f..4f0a74b 100644
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSimple.cpp
@@ -684,9 +684,11 @@
   if (&MF.front() == BB && MF.livein_begin() != MF.livein_end()) {
     for (MachineFunction::livein_iterator LI = MF.livein_begin(),
          E = MF.livein_end(); LI != E; ++LI)
-      if (LI->second)
+      if (LI->second) {
+        const TargetRegisterClass *RC = RegMap->getRegClass(LI->second);
         MRI->copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
-                          LI->first, RegMap->getRegClass(LI->second));
+                          LI->first, RC, RC);
+      }
   }
   
   DenseMap<SDOperand, unsigned> VRBaseMap;