commit b4b54153ad760c69a00a08531abef4ed434a5092
author Tony Linthicum <tlinth@codeaurora.org> Mon Dec 12 21:14:40 2011 +0000
committer Tony Linthicum <tlinth@codeaurora.org> Mon Dec 12 21:14:40 2011 +0000
tree 5c767f5ad7f35af4cb8dc0228769e16d62c993e7
parent 127a669d09e21ddcd525f493c19dc399093bef35

Hexagon backend support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146412 91177308-0d34-0410-b5e6-96231b3b80d8

docs/CodeGenerator.html

diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html
index 4f762dc..f42af12 100644
--- a/docs/CodeGenerator.html
+++ b/docs/CodeGenerator.html
@@ -2288,6 +2288,7 @@
     <th>Feature</th>
     <th>ARM</th>
     <th>CellSPU</th>
+    <th>Hexagon</th>
     <th>MBlaze</th>
     <th>MSP430</th>
     <th>Mips</th>
@@ -2302,6 +2303,7 @@
   <td><a href="#feat_reliable">is generally reliable</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="yes"></td> <!-- Hexagon -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
   <td class="yes"></td> <!-- Mips -->
@@ -2316,6 +2318,7 @@
   <td><a href="#feat_asmparser">assembly parser</a></td>
   <td class="no"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="no"></td> <!-- Hexagon -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
@@ -2330,6 +2333,7 @@
   <td><a href="#feat_disassembler">disassembler</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="no"></td> <!-- Hexagon -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
@@ -2344,6 +2348,7 @@
   <td><a href="#feat_inlineasm">inline asm</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="yes"></td> <!-- Hexagon -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
@@ -2358,6 +2363,7 @@
   <td><a href="#feat_jit">jit</a></td>
   <td class="partial"><a href="#feat_jit_arm">*</a></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="no"></td> <!-- Hexagon -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
   <td class="yes"></td> <!-- Mips -->
@@ -2372,6 +2378,7 @@
   <td><a href="#feat_objectwrite">.o&nbsp;file writing</a></td>
   <td class="no"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="no"></td> <!-- Hexagon -->
   <td class="yes"></td> <!-- MBlaze -->
   <td class="no"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->
@@ -2386,6 +2393,7 @@
   <td><a href="#feat_tailcall">tail calls</a></td>
   <td class="yes"></td> <!-- ARM -->
   <td class="no"></td> <!-- CellSPU -->
+  <td class="yes"></td> <!-- Hexagon -->
   <td class="no"></td> <!-- MBlaze -->
   <td class="unknown"></td> <!-- MSP430 -->
   <td class="no"></td> <!-- Mips -->