Convert CodeGen/*/*.ll tests to use the new CHECK-LABEL for easier debugging. No functionality change and all tests pass after conversion.
This was done with the following sed invocation to catch label lines demarking function boundaries:
sed -i '' "s/^;\( *\)\([A-Z0-9_]*\):\( *\)test\([A-Za-z0-9_-]*\):\( *\)$/;\1\2-LABEL:\3test\4:\5/g" test/CodeGen/*/*.ll
which was written conservatively to avoid false positives rather than false negatives. I scanned through all the changes and everything looks correct.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186258 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/Mips/align16.ll b/test/CodeGen/Mips/align16.ll
index 99139ab..815c84d 100644
--- a/test/CodeGen/Mips/align16.ll
+++ b/test/CodeGen/Mips/align16.ll
@@ -28,4 +28,4 @@
; 16: save $ra, $s0, $s1, 2040
; 16: addiu $sp, -48 # 16 bit inst
; 16: addiu $sp, 48 # 16 bit inst
-; 16: restore $ra, $s0, $s1, 2040
\ No newline at end of file
+; 16: restore $ra, $s0, $s1, 2040
diff --git a/test/CodeGen/Mips/blez_bgez.ll b/test/CodeGen/Mips/blez_bgez.ll
index 52765af..f6a5e4f 100644
--- a/test/CodeGen/Mips/blez_bgez.ll
+++ b/test/CodeGen/Mips/blez_bgez.ll
@@ -1,7 +1,7 @@
; RUN: llc -march=mipsel < %s | FileCheck %s
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s
-; CHECK: test_blez:
+; CHECK-LABEL: test_blez:
; CHECK: blez ${{[0-9]+}}, $BB
define void @test_blez(i32 %a) {
@@ -19,7 +19,7 @@
declare void @foo1()
-; CHECK: test_bgez:
+; CHECK-LABEL: test_bgez:
; CHECK: bgez ${{[0-9]+}}, $BB
define void @test_bgez(i32 %a) {
diff --git a/test/CodeGen/Mips/dsp-patterns.ll b/test/CodeGen/Mips/dsp-patterns.ll
index eeb7140..ae0167b 100644
--- a/test/CodeGen/Mips/dsp-patterns.ll
+++ b/test/CodeGen/Mips/dsp-patterns.ll
@@ -1,7 +1,7 @@
; RUN: llc -march=mips -mattr=dsp < %s | FileCheck %s -check-prefix=R1
; RUN: llc -march=mips -mattr=dspr2 < %s | FileCheck %s -check-prefix=R2
-; R1: test_lbux:
+; R1-LABEL: test_lbux:
; R1: lbux ${{[0-9]+}}
define zeroext i8 @test_lbux(i8* nocapture %b, i32 %i) {
@@ -11,7 +11,7 @@
ret i8 %0
}
-; R1: test_lhx:
+; R1-LABEL: test_lhx:
; R1: lhx ${{[0-9]+}}
define signext i16 @test_lhx(i16* nocapture %b, i32 %i) {
@@ -21,7 +21,7 @@
ret i16 %0
}
-; R1: test_lwx:
+; R1-LABEL: test_lwx:
; R1: lwx ${{[0-9]+}}
define i32 @test_lwx(i32* nocapture %b, i32 %i) {
@@ -31,7 +31,7 @@
ret i32 %0
}
-; R1: test_add_v2q15_:
+; R1-LABEL: test_add_v2q15_:
; R1: addq.ph ${{[0-9]+}}
define { i32 } @test_add_v2q15_(i32 %a.coerce, i32 %b.coerce) {
@@ -44,7 +44,7 @@
ret { i32 } %.fca.0.insert
}
-; R1: test_sub_v2q15_:
+; R1-LABEL: test_sub_v2q15_:
; R1: subq.ph ${{[0-9]+}}
define { i32 } @test_sub_v2q15_(i32 %a.coerce, i32 %b.coerce) {
@@ -57,11 +57,11 @@
ret { i32 } %.fca.0.insert
}
-; R2: test_mul_v2q15_:
+; R2-LABEL: test_mul_v2q15_:
; R2: mul.ph ${{[0-9]+}}
; mul.ph is an R2 instruction. Check that multiply node gets expanded.
-; R1: test_mul_v2q15_:
+; R1-LABEL: test_mul_v2q15_:
; R1: mul ${{[0-9]+}}
; R1: mul ${{[0-9]+}}
@@ -75,7 +75,7 @@
ret { i32 } %.fca.0.insert
}
-; R1: test_add_v4i8_:
+; R1-LABEL: test_add_v4i8_:
; R1: addu.qb ${{[0-9]+}}
define { i32 } @test_add_v4i8_(i32 %a.coerce, i32 %b.coerce) {
@@ -88,7 +88,7 @@
ret { i32 } %.fca.0.insert
}
-; R1: test_sub_v4i8_:
+; R1-LABEL: test_sub_v4i8_:
; R1: subu.qb ${{[0-9]+}}
define { i32 } @test_sub_v4i8_(i32 %a.coerce, i32 %b.coerce) {
@@ -102,7 +102,7 @@
}
; DSP-ASE doesn't have a v4i8 multiply instruction. Check that multiply node gets expanded.
-; R2: test_mul_v4i8_:
+; R2-LABEL: test_mul_v4i8_:
; R2: mul ${{[0-9]+}}
; R2: mul ${{[0-9]+}}
; R2: mul ${{[0-9]+}}
@@ -118,7 +118,7 @@
ret { i32 } %.fca.0.insert
}
-; R1: test_addsc:
+; R1-LABEL: test_addsc:
; R1: addsc ${{[0-9]+}}
; R1: addwc ${{[0-9]+}}
@@ -206,7 +206,7 @@
; Check that shift node is expanded if splat element size is not 16-bit.
;
-; R1: test_vector_splat_imm_v2q15:
+; R1-LABEL: test_vector_splat_imm_v2q15:
; R1-NOT: shll.ph
define { i32 } @test_vector_splat_imm_v2q15(i32 %a.coerce) {
@@ -220,7 +220,7 @@
; Check that shift node is expanded if splat element size is not 8-bit.
;
-; R1: test_vector_splat_imm_v4i8:
+; R1-LABEL: test_vector_splat_imm_v4i8:
; R1-NOT: shll.qb
define { i32 } @test_vector_splat_imm_v4i8(i32 %a.coerce) {
@@ -234,7 +234,7 @@
; Check that shift node is expanded if shift amount doesn't fit in 4-bit sa field.
;
-; R1: test_shift_amount_v2q15:
+; R1-LABEL: test_shift_amount_v2q15:
; R1-NOT: shll.ph
define { i32 } @test_shift_amount_v2q15(i32 %a.coerce) {
@@ -248,7 +248,7 @@
; Check that shift node is expanded if shift amount doesn't fit in 3-bit sa field.
;
-; R1: test_shift_amount_v4i8:
+; R1-LABEL: test_shift_amount_v4i8:
; R1-NOT: shll.qb
define { i32 } @test_shift_amount_v4i8(i32 %a.coerce) {
diff --git a/test/CodeGen/Mips/int-to-float-conversion.ll b/test/CodeGen/Mips/int-to-float-conversion.ll
index 2a7dfdd..c2baf44 100644
--- a/test/CodeGen/Mips/int-to-float-conversion.ll
+++ b/test/CodeGen/Mips/int-to-float-conversion.ll
@@ -4,7 +4,7 @@
@i1 = global [3 x i32] [i32 1, i32 2, i32 3], align 4
@i3 = common global i32* null, align 4
-; 32: test_float_int_:
+; 32-LABEL: test_float_int_:
; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
; 32: cvt.s.w $f{{[0-9]+}}, $f[[R0]]
@@ -14,10 +14,10 @@
ret float %conv
}
-; 32: test_double_int_:
+; 32-LABEL: test_double_int_:
; 32: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
; 32: cvt.d.w $f{{[0-9]+}}, $f[[R0]]
-; 64: test_double_int_:
+; 64-LABEL: test_double_int_:
; 64: mtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
; 64: cvt.d.w $f{{[0-9]+}}, $f[[R0]]
@@ -27,7 +27,7 @@
ret double %conv
}
-; 64: test_float_LL_:
+; 64-LABEL: test_float_LL_:
; 64: dmtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
; 64: cvt.s.l $f{{[0-9]+}}, $f[[R0]]
@@ -37,7 +37,7 @@
ret float %conv
}
-; 64: test_double_LL_:
+; 64-LABEL: test_double_LL_:
; 64: dmtc1 ${{[0-9]+}}, $f[[R0:[0-9]+]]
; 64: cvt.d.l $f{{[0-9]+}}, $f[[R0]]
diff --git a/test/CodeGen/Mips/optimize-fp-math.ll b/test/CodeGen/Mips/optimize-fp-math.ll
index 9348d3c..8b71dc4 100644
--- a/test/CodeGen/Mips/optimize-fp-math.ll
+++ b/test/CodeGen/Mips/optimize-fp-math.ll
@@ -1,10 +1,10 @@
; RUN: llc -march=mipsel < %s | FileCheck %s -check-prefix=32
; RUN: llc -march=mips64el -mcpu=mips64 < %s | FileCheck %s -check-prefix=64
-; 32: test_sqrtf_float_:
+; 32-LABEL: test_sqrtf_float_:
; 32: sqrt.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
; 32: c.un.s $f[[R0]], $f[[R0]]
-; 64: test_sqrtf_float_:
+; 64-LABEL: test_sqrtf_float_:
; 64: sqrt.s $f[[R0:[0-9]+]], $f{{[0-9]+}}
; 64: c.un.s $f[[R0]], $f[[R0]]
@@ -16,10 +16,10 @@
declare float @sqrtf(float)
-; 32: test_sqrt_double_:
+; 32-LABEL: test_sqrt_double_:
; 32: sqrt.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
; 32: c.un.d $f[[R0]], $f[[R0]]
-; 64: test_sqrt_double_:
+; 64-LABEL: test_sqrt_double_:
; 64: sqrt.d $f[[R0:[0-9]+]], $f{{[0-9]+}}
; 64: c.un.d $f[[R0]], $f[[R0]]
diff --git a/test/CodeGen/Mips/selnek.ll b/test/CodeGen/Mips/selnek.ll
index 2601552..64834b2 100644
--- a/test/CodeGen/Mips/selnek.ll
+++ b/test/CodeGen/Mips/selnek.ll
@@ -104,4 +104,4 @@
; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}
; 16: cmpi ${{[0-9]+}}, 1000
-; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}
\ No newline at end of file
+; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}