commit b501d4f673c0db267a76800339f9943f2ce6fe33
author Chris Lattner <sabre@nondot.org> Mon Nov 01 05:34:34 2010 +0000
committer Chris Lattner <sabre@nondot.org> Mon Nov 01 05:34:34 2010 +0000
tree c835a0e3af765525abdaed5808a87ffd40080f56
parent b8d14a6611276181f9fd0d9b2a1243150e4a5739

Implement enough of the missing instalias support to get
aliases installed and working.  They now work when the
matched pattern and the result instruction have exactly
the same operand list.

This is now enough for us to define proper aliases for
movzx and movsx, implementing rdar://8017633 and PR7459.

Note that we do not accept instructions like:
  movzx 0(%rsp), %rsi

GAS accepts this instruction, but it doesn't make any
sense because we don't know the size of the memory
operand.  It could be 8/16/32 bits.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117901 91177308-0d34-0410-b5e6-96231b3b80d8

utils/TableGen/AsmMatcherEmitter.cpp

diff --git a/utils/TableGen/AsmMatcherEmitter.cpp b/utils/TableGen/AsmMatcherEmitter.cpp
index b4b6331..f422106 100644
--- a/utils/TableGen/AsmMatcherEmitter.cpp
+++ b/utils/TableGen/AsmMatcherEmitter.cpp
@@ -357,12 +357,18 @@
   
   MatchableInfo(const CodeGenInstruction &CGI)
     : TheDef(CGI.TheDef), OperandList(CGI.Operands), AsmString(CGI.AsmString) {
+    InstrName = TheDef->getName();
   }
 
   MatchableInfo(const CodeGenInstAlias *Alias)
     : TheDef(Alias->TheDef), OperandList(Alias->Operands),
       AsmString(Alias->AsmString) {
-    
+        
+    // FIXME: Huge hack.
+    DefInit *DI = dynamic_cast<DefInit*>(Alias->Result->getOperator());
+    assert(DI);
+        
+    InstrName = DI->getDef()->getName();
   }
   
   void Initialize(const AsmMatcherInfo &Info,
@@ -551,8 +557,6 @@
 
 void MatchableInfo::Initialize(const AsmMatcherInfo &Info,
                                SmallPtrSet<Record*, 16> &SingletonRegisters) {
-  InstrName = TheDef->getName();
-  
   // TODO: Eventually support asmparser for Variant != 0.
   AsmString = CodeGenInstruction::FlattenAsmStringVariants(AsmString, 0);
   
@@ -974,7 +978,7 @@
     // Validate the alias definitions.
     II->Validate(CommentDelimiter, false);
     
-    //Matchables.push_back(II.take());
+    Matchables.push_back(II.take());
   }
 
   // Build info for the register classes.

utils/TableGen/CodeGenInstruction.cpp

diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index 8a05374..7428f2c 100644
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -110,6 +110,12 @@
                                       MIOperandNo, NumOps, MIOpInfo));
     MIOperandNo += NumOps;
   }
+  
+  
+  // Make sure the constraints list for each operand is large enough to hold
+  // constraint info, even if none is present.
+  for (unsigned i = 0, e = OperandList.size(); i != e; ++i)
+    OperandList[i].Constraints.resize(OperandList[i].MINumOperands);
 }
 
 
@@ -235,11 +241,6 @@
 }
 
 static void ParseConstraints(const std::string &CStr, CGIOperandList &Ops) {
-  // Make sure the constraints list for each operand is large enough to hold
-  // constraint info, even if none is present.
-  for (unsigned i = 0, e = Ops.size(); i != e; ++i)
-    Ops[i].Constraints.resize(Ops[i].MINumOperands);
-  
   if (CStr.empty()) return;
   
   const std::string delims(",");
@@ -390,5 +391,5 @@
 CodeGenInstAlias::CodeGenInstAlias(Record *R) : TheDef(R), Operands(R) {
   AsmString = R->getValueAsString("AsmString");
 
-  
+  Result = R->getValueAsDag("ResultInst");
 }

utils/TableGen/CodeGenInstruction.h

diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index f05a88f..78c88d7 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -250,6 +250,9 @@
     /// to the alias.
     CGIOperandList Operands;
     
+    /// Result - The result instruction.
+    DagInit *Result;
+    
     CodeGenInstAlias(Record *R);
   };    
 }