Don't cache the instruction and register info from the TargetMachine, because
the internals of TargetMachine could change.
No functionality change intended.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183561 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp
index fcb5b7e..ea1a07e 100644
--- a/lib/Target/R600/AMDILCFGStructurizer.cpp
+++ b/lib/Target/R600/AMDILCFGStructurizer.cpp
@@ -2472,23 +2472,26 @@
protected:
TargetMachine &TM;
- const TargetInstrInfo *TII;
- const AMDGPURegisterInfo *TRI;
public:
AMDGPUCFGStructurizer(char &pid, TargetMachine &tm);
const TargetInstrInfo *getTargetInstrInfo() const;
+ const AMDGPURegisterInfo *getTargetRegisterInfo() const;
};
} // end anonymous namespace
AMDGPUCFGStructurizer::AMDGPUCFGStructurizer(char &pid, TargetMachine &tm)
-: MachineFunctionPass(pid), TM(tm), TII(tm.getInstrInfo()),
- TRI(static_cast<const AMDGPURegisterInfo *>(tm.getRegisterInfo())) {
+ : MachineFunctionPass(pid), TM(tm) {
}
const TargetInstrInfo *AMDGPUCFGStructurizer::getTargetInstrInfo() const {
- return TII;
+ return TM.getInstrInfo();
}
+
+const AMDGPURegisterInfo *AMDGPUCFGStructurizer::getTargetRegisterInfo() const {
+ return static_cast<const AMDGPURegisterInfo *>(TM.getRegisterInfo());
+}
+
//===----------------------------------------------------------------------===//
//
// CFGPrepare
@@ -3017,7 +3020,8 @@
}
bool AMDGPUCFGPrepare::runOnMachineFunction(MachineFunction &func) {
- return CFGStructurizer<AMDGPUCFGStructurizer>().prepare(func, *this, TRI);
+ return CFGStructurizer<AMDGPUCFGStructurizer>().prepare(func, *this,
+ getTargetRegisterInfo());
}
// createAMDGPUCFGStructurizerPass- Returns a pass
@@ -3026,5 +3030,6 @@
}
bool AMDGPUCFGPerform::runOnMachineFunction(MachineFunction &func) {
- return CFGStructurizer<AMDGPUCFGStructurizer>().run(func, *this, TRI);
+ return CFGStructurizer<AMDGPUCFGStructurizer>().run(func, *this,
+ getTargetRegisterInfo());
}