diff --git a/lib/Target/Alpha/AlphaISelPattern.cpp b/lib/Target/Alpha/AlphaISelPattern.cpp
index aa4ed3b..3fcba64 100644
--- a/lib/Target/Alpha/AlphaISelPattern.cpp
+++ b/lib/Target/Alpha/AlphaISelPattern.cpp
@@ -82,7 +82,7 @@
       if (!EnableAlphaCT) {
         setOperationAction(ISD::CTPOP    , MVT::i64  , Expand);
         setOperationAction(ISD::CTTZ     , MVT::i64  , Expand);
-        setOperationAction(ISD::CTTZ     , MVT::i64  , Expand);
+        setOperationAction(ISD::CTLZ     , MVT::i64  , Expand);
       }
 
       //If this didn't legalize into a div....
diff --git a/lib/Target/IA64/IA64ISelPattern.cpp b/lib/Target/IA64/IA64ISelPattern.cpp
index badc89f..7722ac2 100644
--- a/lib/Target/IA64/IA64ISelPattern.cpp
+++ b/lib/Target/IA64/IA64ISelPattern.cpp
@@ -89,6 +89,11 @@
       setOperationAction(ISD::FCOS , MVT::f32, Expand);
       setOperationAction(ISD::FSQRT, MVT::f32, Expand);
 
+      //IA64 has these, but they are not implemented
+      setOperationAction(ISD::CTPOP, MVT::i32  , Expand);
+      setOperationAction(ISD::CTTZ , MVT::i32  , Expand);
+      setOperationAction(ISD::CTLZ , MVT::i32  , Expand);
+
       computeRegisterProperties();
 
       addLegalFPImmediate(+0.0);
diff --git a/lib/Target/PowerPC/PPC64ISelPattern.cpp b/lib/Target/PowerPC/PPC64ISelPattern.cpp
index 25fbb98..54f540f 100644
--- a/lib/Target/PowerPC/PPC64ISelPattern.cpp
+++ b/lib/Target/PowerPC/PPC64ISelPattern.cpp
@@ -71,7 +71,7 @@
       // PowerPC has these, but they are not implemented
       setOperationAction(ISD::CTPOP, MVT::i64, Expand);
       setOperationAction(ISD::CTTZ , MVT::i64, Expand);
-      setOperationAction(ISD::CTTZ , MVT::i64, Expand);
+      setOperationAction(ISD::CTLZ , MVT::i64, Expand);
 
       setShiftAmountFlavor(Extend);   // shl X, 32 == 0
       addLegalFPImmediate(+0.0); // Necessary for FSEL
diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 6ed3338..7faaee8 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -72,7 +72,7 @@
       //PowerPC has these, but they are not implemented
       setOperationAction(ISD::CTPOP, MVT::i32  , Expand);
       setOperationAction(ISD::CTTZ , MVT::i32  , Expand);
-      setOperationAction(ISD::CTTZ , MVT::i32  , Expand);
+      setOperationAction(ISD::CTLZ , MVT::i32  , Expand);
 
       setSetCCResultContents(ZeroOrOneSetCCResult);
       addLegalFPImmediate(+0.0); // Necessary for FSEL
diff --git a/lib/Target/X86/X86ISelPattern.cpp b/lib/Target/X86/X86ISelPattern.cpp
index 0737842..78561fa 100644
--- a/lib/Target/X86/X86ISelPattern.cpp
+++ b/lib/Target/X86/X86ISelPattern.cpp
@@ -66,7 +66,7 @@
       setOperationAction(ISD::SREM             , MVT::f64  , Expand);
       setOperationAction(ISD::CTPOP            , MVT::i32  , Expand);
       setOperationAction(ISD::CTTZ             , MVT::i32  , Expand);
-      setOperationAction(ISD::CTTZ             , MVT::i32  , Expand);
+      setOperationAction(ISD::CTLZ             , MVT::i32  , Expand);
 
       if (!UnsafeFPMath) {
         setOperationAction(ISD::FSIN           , MVT::f64  , Expand);