commit b5f662fa0314f7e7e690aae8ebff7136cc3a5ab0
author Misha Brukman <brukman+llvm@gmail.com> Thu Apr 21 23:30:14 2005 +0000
committer Misha Brukman <brukman+llvm@gmail.com> Thu Apr 21 23:30:14 2005 +0000
tree e7c0cbff032351446ce38058e84f6f6f9fd2300d
parent 4633f1cde84b1dbb05dfbdce17ca6b483596cee7

Remove trailing whitespace


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21425 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCTargetMachine.cpp

diff --git a/lib/Target/PowerPC/PPCTargetMachine.cpp b/lib/Target/PowerPC/PPCTargetMachine.cpp
index 6286735..b4f6fa4 100644
--- a/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -1,12 +1,12 @@
 //===-- PowerPCTargetMachine.cpp - Define TargetMachine for PowerPC -------===//
-// 
+//
 //                     The LLVM Compiler Infrastructure
 //
 // This file was developed by the LLVM research group and is distributed under
 // the University of Illinois Open Source License. See LICENSE.TXT for details.
-// 
+//
 //===----------------------------------------------------------------------===//
-// 
+//
 //
 //===----------------------------------------------------------------------===//
 
@@ -31,13 +31,13 @@
 
 namespace llvm {
   bool PPCCRopts;
-  cl::opt<bool> AIX("aix", 
-                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"), 
+  cl::opt<bool> AIX("aix",
+                    cl::desc("Generate AIX/xcoff instead of Darwin/MachO"),
                     cl::Hidden);
-  cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc", 
-                             cl::desc("Enable LSR for PPC (beta)"), 
+  cl::opt<bool> EnablePPCLSR("enable-lsr-for-ppc",
+                             cl::desc("Enable LSR for PPC (beta)"),
                              cl::Hidden);
-  cl::opt<bool, true> EnablePPCCRopts("enable-cc-opts", 
+  cl::opt<bool, true> EnablePPCCRopts("enable-cc-opts",
                             cl::desc("Enable opts using condition regs (beta)"),
                             cl::location(PPCCRopts),
                             cl::init(false),
@@ -47,13 +47,13 @@
 namespace {
   const std::string PPC32ID = "PowerPC/32bit";
   const std::string PPC64ID = "PowerPC/64bit";
-  
+
   // Register the targets
-  RegisterTarget<PPC32TargetMachine> 
+  RegisterTarget<PPC32TargetMachine>
   X("ppc32", "  PowerPC 32-bit");
 
 #if 0
-  RegisterTarget<PPC64TargetMachine> 
+  RegisterTarget<PPC64TargetMachine>
   Y("ppc64", "  PowerPC 64-bit (unimplemented)");
 #endif
 }
@@ -84,7 +84,7 @@
     PM.add(createLoopStrengthReducePass());
     PM.add(createCFGSimplificationPass());
   }
-  
+
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
 
@@ -116,15 +116,15 @@
     PM.add(createMachineFunctionPrinterPass(&std::cerr));
 
   PM.add(createPrologEpilogCodeInserter());
-  
+
   // Must run branch selection immediately preceding the asm printer
   PM.add(createPPCBranchSelectionPass());
-  
+
   if (AIX)
     PM.add(createAIXAsmPrinter(Out, *this));
   else
     PM.add(createDarwinAsmPrinter(Out, *this));
-    
+
   PM.add(createMachineCodeDeleter());
   return false;
 }
@@ -172,7 +172,7 @@
 /// PowerPCTargetMachine ctor - Create an ILP32 architecture model
 ///
 PPC32TargetMachine::PPC32TargetMachine(const Module &M, IntrinsicLowering *IL)
-  : PowerPCTargetMachine(PPC32ID, IL, 
+  : PowerPCTargetMachine(PPC32ID, IL,
                          TargetData(PPC32ID,false,4,4,4,4,4,4,2,1,1),
                          PowerPCFrameInfo(*this, false)), JITInfo(*this) {}