diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 23e1037..97134ee 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -263,7 +263,7 @@
   } else {
     setOperationAction(ISD::MUL,     MVT::i64, Expand);
     setOperationAction(ISD::MULHU,   MVT::i32, Expand);
-    if (!Subtarget->isThumb1Only() && !Subtarget->hasV6Ops())
+    if (!Subtarget->hasV6Ops())
       setOperationAction(ISD::MULHS, MVT::i32, Expand);
   }
   setOperationAction(ISD::SHL_PARTS, MVT::i32, Expand);
@@ -985,8 +985,8 @@
 
   // FIXME: handle tail calls differently.
   unsigned CallOpc;
-  if (Subtarget->isThumb1Only()) {
-    if (!Subtarget->hasV5TOps() && (!isDirect || isARMFunc))
+  if (Subtarget->isThumb()) {
+    if ((!isDirect || isARMFunc) && !Subtarget->hasV5TOps())
       CallOpc = ARMISD::CALL_NOLINK;
     else
       CallOpc = isARMFunc ? ARMISD::CALL : ARMISD::tCALL;
diff --git a/lib/Target/ARM/ARMInstrFormats.td b/lib/Target/ARM/ARMInstrFormats.td
index 3194fbc..fe32c5f 100644
--- a/lib/Target/ARM/ARMInstrFormats.td
+++ b/lib/Target/ARM/ARMInstrFormats.td
@@ -808,7 +808,7 @@
 class TI<dag oops, dag iops, string asm, list<dag> pattern>
   : ThumbI<oops, iops, AddrModeNone, Size2Bytes, asm, "", pattern>;
 
-// BL, BLX(1) are translated by assembler into two instructions
+// tBL, tBX instructions
 class TIx2<dag oops, dag iops, string asm, list<dag> pattern>
   : ThumbI<oops, iops, AddrModeNone, Size4Bytes, asm, "", pattern>;
 
diff --git a/lib/Target/ARM/ARMInstrThumb.td b/lib/Target/ARM/ARMInstrThumb.td
index b7aa941..9917e01 100644
--- a/lib/Target/ARM/ARMInstrThumb.td
+++ b/lib/Target/ARM/ARMInstrThumb.td
@@ -170,24 +170,26 @@
           D0,  D1,  D2,  D3,  D4,  D5,  D6,  D7,
           D16, D17, D18, D19, D20, D21, D22, D23,
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
-  def tBL  : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
+  // Also used for Thumb2
+  def tBL  : TIx2<(outs), (ins i32imm:$func, variable_ops),
                    "bl ${func:call}",
                    [(ARMtcall tglobaladdr:$func)]>,
-             Requires<[IsThumb1Only, IsNotDarwin]>;
+             Requires<[IsThumb, IsNotDarwin]>;
 
-  // ARMv5T and above
-  def tBLXi : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
+  // ARMv5T and above, also used for Thumb2
+  def tBLXi : TIx2<(outs), (ins i32imm:$func, variable_ops),
                     "blx ${func:call}",
                     [(ARMcall tglobaladdr:$func)]>,
-              Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+              Requires<[IsThumb, HasV5T, IsNotDarwin]>;
 
-  def tBLXr : T1I<(outs), (ins tGPR:$func, variable_ops),
+  // Also used for Thumb2
+  def tBLXr : TI<(outs), (ins GPR:$func, variable_ops),
                   "blx $func",
-                  [(ARMtcall tGPR:$func)]>,
-              Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+                  [(ARMtcall GPR:$func)]>,
+              Requires<[IsThumb, HasV5T, IsNotDarwin]>;
 
   // ARMv4T
-  def tBX : T1Ix2<(outs), (ins tGPR:$func, variable_ops),
+  def tBX : TIx2<(outs), (ins tGPR:$func, variable_ops),
                   "mov lr, pc\n\tbx $func",
                   [(ARMcall_nolink tGPR:$func)]>,
             Requires<[IsThumb1Only, IsNotDarwin]>;
@@ -199,24 +201,26 @@
           D0,  D1,  D2,  D3,  D4,  D5,  D6,  D7,
           D16, D17, D18, D19, D20, D21, D22, D23,
           D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
-  def tBLr9 : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
+  // Also used for Thumb2
+  def tBLr9 : TIx2<(outs), (ins i32imm:$func, variable_ops),
                    "bl ${func:call}",
                    [(ARMtcall tglobaladdr:$func)]>,
-             Requires<[IsThumb1Only, IsDarwin]>;
+              Requires<[IsThumb, IsDarwin]>;
 
-  // ARMv5T and above
-  def tBLXi_r9 : T1Ix2<(outs), (ins i32imm:$func, variable_ops),
+  // ARMv5T and above, also used for Thumb2
+  def tBLXi_r9 : TIx2<(outs), (ins i32imm:$func, variable_ops),
                       "blx ${func:call}",
                       [(ARMcall tglobaladdr:$func)]>,
-                 Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
+                 Requires<[IsThumb, HasV5T, IsDarwin]>;
 
-  def tBLXr_r9 : T1I<(outs), (ins tGPR:$func, variable_ops),
+  // Also used for Thumb2
+  def tBLXr_r9 : TI<(outs), (ins GPR:$func, variable_ops),
                   "blx $func",
-                  [(ARMtcall tGPR:$func)]>,
-                 Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
+                  [(ARMtcall GPR:$func)]>,
+                 Requires<[IsThumb, HasV5T, IsDarwin]>;
 
   // ARMv4T
-  def tBXr9 : T1Ix2<(outs), (ins tGPR:$func, variable_ops),
+  def tBXr9 : TIx2<(outs), (ins tGPR:$func, variable_ops),
                   "mov lr, pc\n\tbx $func",
                   [(ARMcall_nolink tGPR:$func)]>,
               Requires<[IsThumb1Only, IsDarwin]>;
@@ -229,7 +233,7 @@
                    [(br bb:$target)]>;
 
   // Far jump
-  def tBfar : T1Ix2<(outs), (ins brtarget:$target), 
+  def tBfar : TIx2<(outs), (ins brtarget:$target), 
                     "bl $target\t@ far jump",[]>;
 
   def tBR_JTr : T1JTI<(outs),
@@ -601,7 +605,7 @@
 // __aeabi_read_tp preserves the registers r1-r3.
 let isCall = 1,
   Defs = [R0, LR] in {
-  def tTPsoft  : T1Ix2<(outs), (ins),
+  def tTPsoft  : TIx2<(outs), (ins),
                "bl __aeabi_read_tp",
                [(set R0, ARMthread_pointer)]>;
 }
@@ -636,20 +640,20 @@
 
 // Direct calls
 def : T1Pat<(ARMtcall texternalsym:$func), (tBL texternalsym:$func)>,
-      Requires<[IsThumb1Only, IsNotDarwin]>;
+      Requires<[IsThumb, IsNotDarwin]>;
 def : T1Pat<(ARMtcall texternalsym:$func), (tBLr9 texternalsym:$func)>,
-      Requires<[IsThumb1Only, IsDarwin]>;
+      Requires<[IsThumb, IsDarwin]>;
 
 def : Tv5Pat<(ARMcall texternalsym:$func), (tBLXi texternalsym:$func)>,
-      Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
+      Requires<[IsThumb, HasV5T, IsNotDarwin]>;
 def : Tv5Pat<(ARMcall texternalsym:$func), (tBLXi_r9 texternalsym:$func)>,
-      Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
+      Requires<[IsThumb, HasV5T, IsDarwin]>;
 
 // Indirect calls to ARM routines
-def : Tv5Pat<(ARMcall tGPR:$dst), (tBLXr tGPR:$dst)>,
-      Requires<[IsThumb1Only, HasV5T, IsNotDarwin]>;
-def : Tv5Pat<(ARMcall tGPR:$dst), (tBLXr_r9 tGPR:$dst)>,
-      Requires<[IsThumb1Only, HasV5T, IsDarwin]>;
+def : Tv5Pat<(ARMcall GPR:$dst), (tBLXr GPR:$dst)>,
+      Requires<[IsThumb, HasV5T, IsNotDarwin]>;
+def : Tv5Pat<(ARMcall GPR:$dst), (tBLXr_r9 GPR:$dst)>,
+      Requires<[IsThumb, HasV5T, IsDarwin]>;
 
 // zextload i1 -> zextload i8
 def : T1Pat<(zextloadi1 t_addrmode_s1:$addr),
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td
index 361afcc..bb4f11a 100644
--- a/lib/Target/ARM/ARMInstrThumb2.td
+++ b/lib/Target/ARM/ARMInstrThumb2.td
@@ -1016,40 +1016,6 @@
                     "ldm${addr:submode}${p} $addr, $dst1",
                     []>;
 
-// On non-Darwin platforms R9 is callee-saved.
-let isCall = 1,
-  Defs = [R0,  R1,  R2,  R3,  R12, LR,
-          D0,  D1,  D2,  D3,  D4,  D5,  D6,  D7,
-          D16, D17, D18, D19, D20, D21, D22, D23,
-          D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
-def t2BL  : T2XI<(outs), (ins i32imm:$func, variable_ops),
-                 "bl ${func:call}",
-                  [(ARMcall tglobaladdr:$func)]>,
-            Requires<[IsThumb2, IsNotDarwin]>;
-
-def t2BLX : T2XI<(outs), (ins GPR:$func, variable_ops),
-                "blx $func",
-                [(ARMcall GPR:$func)]>,
-            Requires<[IsThumb2, IsNotDarwin]>;
-}
-
-// On Darwin R9 is call-clobbered.
-let isCall = 1,
-  Defs = [R0, R1, R2, R3, R9, R12, LR,
-          D0,  D1,  D2,  D3,  D4,  D5,  D6,  D7,
-          D16, D17, D18, D19, D20, D21, D22, D23,
-          D24, D25, D26, D27, D28, D29, D30, D31, CPSR] in {
-def t2BLr9  : T2XI<(outs), (ins i32imm:$func, variable_ops),
-                  "bl ${func:call}",
-                  [(ARMcall tglobaladdr:$func)]>,
-              Requires<[IsThumb2, IsDarwin]>;
-
-def t2BLXr9 : T2XI<(outs), (ins GPR:$func, variable_ops),
-                  "blx $func",
-                  [(ARMcall GPR:$func)]>,
-              Requires<[IsThumb2, IsDarwin]>;
-}
-
 let isBranch = 1, isTerminator = 1, isBarrier = 1 in {
 let isPredicable = 1 in
 def t2B   : T2XI<(outs), (ins brtarget:$target),
@@ -1103,9 +1069,3 @@
 
 def : T2Pat<(i32 imm:$src),
             (t2MOVTi16 (t2MOVi16 (t2_lo16 imm:$src)), (t2_hi16 imm:$src))>;
-
-// Direct calls
-def : T2Pat<(ARMcall texternalsym:$func), (t2BL texternalsym:$func)>,
-      Requires<[IsThumb2, IsNotDarwin]>;
-def : T2Pat<(ARMcall texternalsym:$func), (t2BLr9 texternalsym:$func)>,
-      Requires<[IsThumb2, IsDarwin]>;
diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp
index e611088..d30592b 100644
--- a/lib/Target/ARM/ARMSubtarget.cpp
+++ b/lib/Target/ARM/ARMSubtarget.cpp
@@ -75,6 +75,10 @@
     }
   }
 
+  // Thumb2 implies at least V6T2.
+  if (ARMArchVersion < V6T2 && ThumbMode >= Thumb2)
+    ARMArchVersion = V6T2;
+
   if (Len >= 10) {
     if (TT.find("-darwin") != std::string::npos)
       // arm-darwin
diff --git a/test/CodeGen/Thumb2/thumb2-call.ll b/test/CodeGen/Thumb2/thumb2-call.ll
new file mode 100644
index 0000000..23a9b16
--- /dev/null
+++ b/test/CodeGen/Thumb2/thumb2-call.ll
@@ -0,0 +1,20 @@
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | FileCheck %s
+
+@t = weak global i32 ()* null           ; <i32 ()**> [#uses=1]
+
+declare void @g(i32, i32, i32, i32)
+
+define void @f() {
+; CHECK: f:
+; CHECK: blx
+        call void @g( i32 1, i32 2, i32 3, i32 4 )
+        ret void
+}
+
+define void @h() {
+; CHECK: h:
+; CHECK: blx r0
+        %tmp = load i32 ()** @t         ; <i32 ()*> [#uses=1]
+        %tmp.upgrd.2 = tail call i32 %tmp( )            ; <i32> [#uses=0]
+        ret void
+}
diff --git a/test/CodeGen/Thumb2/thumb2-mulhi.ll b/test/CodeGen/Thumb2/thumb2-mulhi.ll
index f2c5233..7b41509 100644
--- a/test/CodeGen/Thumb2/thumb2-mulhi.ll
+++ b/test/CodeGen/Thumb2/thumb2-mulhi.ll
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep smull | count 1
+; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep smmul | count 1
 ; RUN: llvm-as < %s | llc -march=thumb -mattr=+thumb2 | grep umull | count 1
 
 define i32 @smulhi(i32 %x, i32 %y) {