fold away addc nodes when we know there cannot be a carry-out.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34913 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 0de7120..296cf5e 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -2774,6 +2774,7 @@
case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
case ISD::VVECTOR_SHUFFLE: return "vvector_shuffle";
case ISD::VBIT_CONVERT: return "vbit_convert";
+ case ISD::CARRY_FALSE: return "carry_false";
case ISD::ADDC: return "addc";
case ISD::ADDE: return "adde";
case ISD::SUBC: return "subc";