Teach X86 backend to create BMI2 BZHI instructions from (and X, (add (shl 1, Y), -1)). Fixes PR17038.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189653 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/CodeGen/X86/bmi.ll b/test/CodeGen/X86/bmi.ll
index 4eda888..757e98d 100644
--- a/test/CodeGen/X86/bmi.ll
+++ b/test/CodeGen/X86/bmi.ll
@@ -146,6 +146,51 @@
declare i64 @llvm.x86.bmi.bzhi.64(i64, i64) nounwind readnone
+define i32 @bzhi32b(i32 %x, i8 zeroext %index) #0 {
+entry:
+ %conv = zext i8 %index to i32
+ %shl = shl i32 1, %conv
+ %sub = add nsw i32 %shl, -1
+ %and = and i32 %sub, %x
+ ret i32 %and
+; CHECK-LABEL: bzhi32b:
+; CHECK: bzhil
+}
+
+define i32 @bzhi32b_load(i32* %w, i8 zeroext %index) #0 {
+entry:
+ %x = load i32* %w
+ %conv = zext i8 %index to i32
+ %shl = shl i32 1, %conv
+ %sub = add nsw i32 %shl, -1
+ %and = and i32 %sub, %x
+ ret i32 %and
+; CHECK-LABEL: bzhi32b_load:
+; CHECK: bzhil {{.*}}, ({{.*}}), {{.*}}
+}
+
+define i32 @bzhi32c(i32 %x, i8 zeroext %index) #0 {
+entry:
+ %conv = zext i8 %index to i32
+ %shl = shl i32 1, %conv
+ %sub = add nsw i32 %shl, -1
+ %and = and i32 %x, %sub
+ ret i32 %and
+; CHECK-LABEL: bzhi32c:
+; CHECK: bzhil
+}
+
+define i64 @bzhi64b(i64 %x, i8 zeroext %index) #0 {
+entry:
+ %conv = zext i8 %index to i64
+ %shl = shl i64 1, %conv
+ %sub = add nsw i64 %shl, -1
+ %and = and i64 %x, %sub
+ ret i64 %and
+; CHECK-LABEL: bzhi64b:
+; CHECK: bzhiq
+}
+
define i32 @blsi32(i32 %x) nounwind readnone {
%tmp = sub i32 0, %x
%tmp2 = and i32 %x, %tmp