TargetRegisterDesc::Name field is the same as the abstract register name. There is no need for targets to specify register names in addition to their AsmName's.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53207 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Target.td b/lib/Target/Target.td
index 3f897a5..8cc348d 100644
--- a/lib/Target/Target.td
+++ b/lib/Target/Target.td
@@ -26,7 +26,6 @@
class Register<string n> {
string Namespace = "";
string AsmName = n;
- string Name = n;
// SpillSize - If this value is set to a non-zero value, it is the size in
// bits of the spill slot required to hold this register. If this value is
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 0c5e844..2870c80 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -606,16 +606,7 @@
else
OS << Reg.getName();
OS << "\",\t\"";
- if (!Reg.TheDef->getValueAsString("Name").empty()) {
- OS << Reg.TheDef->getValueAsString("Name");
- } else {
- // Default to "name".
- if (!Reg.TheDef->getValueAsString("AsmName").empty())
- OS << Reg.TheDef->getValueAsString("AsmName");
- else
- OS << Reg.getName();
- }
- OS << "\",\t";
+ OS << Reg.getName() << "\",\t";
if (RegisterAliases.count(Reg.TheDef))
OS << Reg.getName() << "_AliasSet,\t";
else