Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class."
Whiny buildbots.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106710 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 6429fa2..7d23cd0 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -218,7 +218,10 @@
return false;
}
-bool LiveIntervals::conflictsWithAliasRef(LiveInterval &li, unsigned Reg,
+/// conflictsWithSubPhysRegRef - Similar to conflictsWithPhysRegRef except
+/// it checks for sub-register reference and it can check use as well.
+bool LiveIntervals::conflictsWithSubPhysRegRef(LiveInterval &li,
+ unsigned Reg, bool CheckUse,
SmallPtrSet<MachineInstr*,32> &JoinedCopies) {
for (LiveInterval::Ranges::const_iterator
I = li.ranges.begin(), E = li.ranges.end(); I != E; ++I) {
@@ -236,11 +239,12 @@
MachineOperand& MO = MI->getOperand(i);
if (!MO.isReg())
continue;
- unsigned PhysReg = MO.getReg();
- if (PhysReg == 0 || PhysReg == Reg ||
- TargetRegisterInfo::isVirtualRegister(PhysReg))
+ if (MO.isUse() && !CheckUse)
continue;
- if (tri_->regsOverlap(Reg, PhysReg))
+ unsigned PhysReg = MO.getReg();
+ if (PhysReg == 0 || TargetRegisterInfo::isVirtualRegister(PhysReg))
+ continue;
+ if (tri_->isSubRegister(Reg, PhysReg))
return true;
}
}
@@ -1280,7 +1284,6 @@
continue;
SlotIndex KillIdx = VNI->kills[j];
- assert(getInstructionFromIndex(KillIdx) && "Dangling kill");
if (KillIdx > Idx && KillIdx <= End)
return true;
}