commit b8f4e0aa1719c1d5b93b096a8723ec7f68b4929a
author Reid Spencer <rspencer@reidspencer.com> Fri Nov 03 03:30:34 2006 +0000
committer Reid Spencer <rspencer@reidspencer.com> Fri Nov 03 03:30:34 2006 +0000
tree 92888609599bc3e678aab05c7d583edf64418634
parent f05696c1b5e5b77d32574f3c03f30b53b0178fce

Remove dead variable. Fix 80 column violations.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31412 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 46aecb8..b85a6b7 100644
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -176,7 +176,6 @@
 
     bool CombineToIndexedLoadStore(SDNode *N) {
       SDOperand Ptr;
-      bool isLoad = true;
       if (LoadSDNode *LD  = dyn_cast<LoadSDNode>(N)) {
         Ptr = LD->getBasePtr();
       } else
@@ -200,7 +199,8 @@
           //    themselves use of loads / stores.
 
           bool OffIsAMImm = Offset.getOpcode() == ISD::Constant &&
-            TLI.isLegalAddressImmediate(cast<ConstantSDNode>(Offset)->getValue());
+            TLI.isLegalAddressImmediate(
+              cast<ConstantSDNode>(Offset)->getValue());
 
           // Check for #3.
           if (OffIsAMImm && BasePtr.Val->use_size() > 1) {
@@ -209,7 +209,7 @@
               SDNode *Use = *I;
               if (Use == Ptr.Val)
                 continue;
-              if (Use->getOpcode() == ISD::ADD || Use->getOpcode() == ISD::SUB) {
+              if (Use->getOpcode() == ISD::ADD || Use->getOpcode() == ISD::SUB){
                 for (SDNode::use_iterator II = Use->use_begin(),
                        EE = Use->use_end(); II != EE; ++II) {
                   SDNode *UseUse = *II;