commit b9e5f803591ea3a8b0f32b05f309b4ccdd6dd1a3
author Bill Wendling <isanbard@gmail.com> Sun Jul 20 02:32:23 2008 +0000
committer Bill Wendling <isanbard@gmail.com> Sun Jul 20 02:32:23 2008 +0000
tree 496abbe53b0305ed52d89415064730014ea79d13
parent 1983a2a6fdcd777d6d3a757baa61307b5ddcb227

Fix for first part of PR2562. Generate the "pinsrw" instruction for inserts
into v4i16 vectors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53807 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ISelLowering.cpp

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 8bfa574..85788ef 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -604,6 +604,8 @@
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v8i8,  Custom);
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v4i16, Custom);
     setOperationAction(ISD::SCALAR_TO_VECTOR,   MVT::v1i64, Custom);
+
+    setOperationAction(ISD::INSERT_VECTOR_ELT,  MVT::v4i16, Custom);
   }
 
   if (Subtarget->hasSSE1()) {