commit b9f4fa7b400836808bc3beab96482418f418f246
author Dan Gohman <gohman@apple.com> Fri Oct 03 15:45:36 2008 +0000
committer Dan Gohman <gohman@apple.com> Fri Oct 03 15:45:36 2008 +0000
tree 9019ef6d07a30709c5afbe52903a7cdfd9615cb1
parent 03ed0daeccf722920d2ee0a76eb399a487674f27

Switch the MachineOperand accessors back to the short names like
isReg, etc., from isRegister, etc.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57006 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/IA64/IA64Bundling.cpp

diff --git a/lib/Target/IA64/IA64Bundling.cpp b/lib/Target/IA64/IA64Bundling.cpp
index c5bc83e..ebf93b9 100644
--- a/lib/Target/IA64/IA64Bundling.cpp
+++ b/lib/Target/IA64/IA64Bundling.cpp
@@ -84,7 +84,7 @@
 
     for(unsigned i=0; i < CurrentInsn->getNumOperands(); i++) {
       MachineOperand &MO=CurrentInsn->getOperand(i);
-      if(MO.isRegister()) {
+      if (MO.isReg()) {
         if(MO.isUse()) { // TODO: exclude p0
           CurrentReads.insert(MO.getReg());
         }