| commit | bacbf1c2cb58af7d839027768a7a67e117a6cc5f | [log] [tgz] |
|---|---|---|
| author | Reed Kotler <rkotler@mips.com> | Thu Dec 20 06:06:35 2012 +0000 |
| committer | Reed Kotler <rkotler@mips.com> | Thu Dec 20 06:06:35 2012 +0000 |
| tree | d3f115b6d280286a9246058ee252a6a832a33991 | |
| parent | 399532b25a939d8c653fd453137bb8e01dc4b8fc [diff] [blame] |
set register class properly for mips16 here git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170669 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index e3abd3e..dd44adb 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp
@@ -3099,7 +3099,8 @@ const TargetRegisterClass *RC; if (RegVT == MVT::i32) - RC = &Mips::CPURegsRegClass; + RC = Subtarget->inMips16Mode()? &Mips::CPU16RegsRegClass : + &Mips::CPURegsRegClass; else if (RegVT == MVT::i64) RC = &Mips::CPU64RegsRegClass; else if (RegVT == MVT::f32)