Add vector shifts to the IR, patch by Eli Friedman.
CodeGen & Clang work coming next.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54161 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 12b7b4a..d8d45d0 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2958,7 +2958,17 @@
Tmp2 = PromoteOp(Node->getOperand(1)); // Promote the RHS.
break;
}
-
+
+ if ((Node->getOpcode() == ISD::SHL ||
+ Node->getOpcode() == ISD::SRL ||
+ Node->getOpcode() == ISD::SRA) &&
+ !Node->getValueType(0).isVector()) {
+ if (TLI.getShiftAmountTy().bitsLT(Tmp2.getValueType()))
+ Tmp2 = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), Tmp2);
+ else if (TLI.getShiftAmountTy().bitsGT(Tmp2.getValueType()))
+ Tmp2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Tmp2);
+ }
+
Result = DAG.UpdateNodeOperands(Result, Tmp1, Tmp2);
switch (TLI.getOperationAction(Node->getOpcode(), Node->getValueType(0))) {
@@ -2966,8 +2976,11 @@
case TargetLowering::Legal: break;
case TargetLowering::Custom:
Tmp1 = TLI.LowerOperation(Result, DAG);
- if (Tmp1.Val) Result = Tmp1;
- break;
+ if (Tmp1.Val) {
+ Result = Tmp1;
+ break;
+ }
+ // Fall through if the custom lower can't deal with the operation
case TargetLowering::Expand: {
MVT VT = Op.getValueType();