commit bb1ee05253d965e0944351a21e9970c02b1aebfe
author Bill Wendling <isanbard@gmail.com> Tue Apr 10 22:10:25 2007 +0000
committer Bill Wendling <isanbard@gmail.com> Tue Apr 10 22:10:25 2007 +0000
tree d7efafbf4ec32844a6e908e5e0fada02eace8d1a
parent 773fd3855310f91aef4ef974ce57ed409d26341d

Add support for our first SSSE3 instruction "pmulhrsw".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35869 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86CodeEmitter.cpp

diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 899e30f..a791e2a 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -584,6 +584,14 @@
   case X86II::TB:
     Need0FPrefix = true;   // Two-byte opcode prefix
     break;
+  case X86II::T8:
+    MCE.emitByte(0x0F);
+    MCE.emitByte(0x38);
+    break;
+  case X86II::TA:
+    MCE.emitByte(0x0F);
+    MCE.emitByte(0x3A);
+    break;
   case X86II::REP: break; // already handled.
   case X86II::XS:   // F3 0F
     MCE.emitByte(0xF3);