commit bb481f882093fb738d2bb15610c79364bada5496
author Jia Liu <proljc@gmail.com> Tue Feb 28 07:46:26 2012 +0000
committer Jia Liu <proljc@gmail.com> Tue Feb 28 07:46:26 2012 +0000
tree b7576c5dfdd780ee43fd00ca3fd5a76a608fa7bd
parent ec52aaa12f57896fc806e849fa21a61603050ac4

remove blanks, and some code format

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Mips/MipsMCInstLower.cpp

diff --git a/lib/Target/Mips/MipsMCInstLower.cpp b/lib/Target/Mips/MipsMCInstLower.cpp
index 37662e9..be65298 100644
--- a/lib/Target/Mips/MipsMCInstLower.cpp
+++ b/lib/Target/Mips/MipsMCInstLower.cpp
@@ -89,7 +89,7 @@
   default:
     llvm_unreachable("<unknown operand type>");
   }
-  
+
   const MCSymbolRefExpr *MCSym = MCSymbolRefExpr::Create(Symbol, Kind, Ctx);
 
   if (!Offset)
@@ -97,7 +97,7 @@
 
   // Assume offset is never negative.
   assert(Offset > 0);
-   
+
   const MCConstantExpr *OffsetExpr =  MCConstantExpr::Create(Offset, Ctx);
   const MCBinaryExpr *AddExpr = MCBinaryExpr::CreateAdd(MCSym, OffsetExpr, Ctx);
   return MCOperand::CreateExpr(AddExpr);
@@ -148,7 +148,7 @@
   MCInst Sw;
 
   if (Offset >= 0x8000) {
-    unsigned Hi = (Offset >> 16) + ((Offset & 0x8000) != 0); 
+    unsigned Hi = (Offset >> 16) + ((Offset & 0x8000) != 0);
     Offset &= 0xffff;
     Reg = Mips::AT;
 
@@ -163,7 +163,7 @@
     MCInsts[1].addOperand(MCOperand::CreateReg(Mips::AT));
     MCInsts[1].addOperand(MCOperand::CreateReg(Mips::SP));
   }
-  
+
   Sw.setOpcode(Mips::SW);
   Sw.addOperand(MCOperand::CreateReg(Mips::GP));
   Sw.addOperand(MCOperand::CreateReg(Reg));
@@ -172,9 +172,9 @@
 }
 
 MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO,
-		                                    unsigned offset) const {
+                                        unsigned offset) const {
   MachineOperandType MOTy = MO.getType();
-  
+
   switch (MOTy) {
   default: llvm_unreachable("unknown operand type");
   case MachineOperand::MO_Register:
@@ -199,7 +199,7 @@
 
 void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
   OutMI.setOpcode(MI->getOpcode());
-  
+
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
     MCOperand MCOp = LowerOperand(MO);
@@ -210,8 +210,8 @@
 }
 
 void MipsMCInstLower::LowerUnalignedLoadStore(const MachineInstr *MI,
-		                                          SmallVector<MCInst,
-		                                          4>& MCInsts) {
+                                              SmallVector<MCInst,
+                                              4>& MCInsts) {
   unsigned Opc = MI->getOpcode();
   MCInst Instr1, Instr2, Instr3, Move;