| commit | bc2198133a1836598b54b943420748e75d5dea94 | [log] [tgz] |
|---|---|---|
| author | Craig Topper <craig.topper@gmail.com> | Tue Feb 07 02:50:20 2012 +0000 |
| committer | Craig Topper <craig.topper@gmail.com> | Tue Feb 07 02:50:20 2012 +0000 |
| tree | b358665906cdd200c0e87842ca112a0518742907 | |
| parent | c5de7fea7b71b2b78f761512dc489c804ec6c18c [diff] [blame] |
Convert assert(0) to llvm_unreachable git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149961 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCMCInstLower.cpp b/lib/Target/PowerPC/PPCMCInstLower.cpp index ff6ebba..276edcb 100644 --- a/lib/Target/PowerPC/PPCMCInstLower.cpp +++ b/lib/Target/PowerPC/PPCMCInstLower.cpp
@@ -140,7 +140,7 @@ switch (MO.getType()) { default: MI->dump(); - assert(0 && "unknown operand type"); + llvm_unreachable("unknown operand type"); case MachineOperand::MO_Register: assert(!MO.getSubReg() && "Subregs should be eliminated!"); MCOp = MCOperand::CreateReg(MO.getReg());