commit bca99f759e94c46a5de6dce726ef3a3f70ba374b
author Rafael Espindola <rafael.espindola@gmail.com> Wed Apr 08 21:14:34 2009 +0000
committer Rafael Espindola <rafael.espindola@gmail.com> Wed Apr 08 21:14:34 2009 +0000
tree 7d025aa19bd757a6367886e31026a87f6650e88a
parent 556132b279f711a5521dd4b9f2b40780f573ef15

Re-apply 68552.
Tested by bootstrapping llvm-gcc and using that to build llvm.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68645 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrBuilder.h

diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h
index 74f9e05..aa3e033 100644
--- a/lib/Target/X86/X86InstrBuilder.h
+++ b/lib/Target/X86/X86InstrBuilder.h
@@ -66,6 +66,15 @@
   return MIB.addReg(Reg).addImm(1).addReg(0).addImm(0);
 }
 
+inline const MachineInstrBuilder &addLeaOffset(const MachineInstrBuilder &MIB,
+                                            int Offset) {
+  return MIB.addImm(1).addReg(0).addImm(Offset);
+}
+
+inline const MachineInstrBuilder &addOffset(const MachineInstrBuilder &MIB,
+                                            int Offset) {
+  return addLeaOffset(MIB, Offset).addReg(0);
+}
 
 /// addRegOffset - This function is used to add a memory reference of the form
 /// [Reg + Offset], i.e., one with no scale or index, but with a
@@ -74,8 +83,13 @@
 inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB,
                                                unsigned Reg, bool isKill,
                                                int Offset) {
-  return MIB.addReg(Reg, false, false, isKill)
-    .addImm(1).addReg(0).addImm(Offset);
+  return addOffset(MIB.addReg(Reg, false, false, isKill), Offset);
+}
+
+inline const MachineInstrBuilder &addLeaRegOffset(const MachineInstrBuilder &MIB,
+                                                  unsigned Reg, bool isKill,
+                                                  int Offset) {
+  return addLeaOffset(MIB.addReg(Reg, false, false, isKill), Offset);
 }
 
 /// addRegReg - This function is used to add a memory reference of the form:
@@ -87,8 +101,8 @@
     .addReg(Reg2, false, false, isKill2).addImm(0);
 }
 
-inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
-                                                 const X86AddressMode &AM) {
+inline const MachineInstrBuilder &addLeaAddress(const MachineInstrBuilder &MIB,
+                                                const X86AddressMode &AM) {
   assert (AM.Scale == 1 || AM.Scale == 2 || AM.Scale == 4 || AM.Scale == 8);
 
   if (AM.BaseType == X86AddressMode::RegBase)
@@ -104,6 +118,11 @@
     return MIB.addImm(AM.Disp);
 }
 
+inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB,
+                                                 const X86AddressMode &AM) {
+  return addLeaAddress(MIB, AM).addReg(0);
+}
+
 /// addFrameReference - This function is used to add a reference to the base of
 /// an abstract object on the stack frame of the current function.  This
 /// reference has base register as the FrameIndex offset until it is resolved.
@@ -125,7 +144,7 @@
                         MFI.getObjectOffset(FI) + Offset,
                         MFI.getObjectSize(FI),
                         MFI.getObjectAlignment(FI));
-  return MIB.addFrameIndex(FI).addImm(1).addReg(0).addImm(Offset)
+  return addOffset(MIB.addFrameIndex(FI), Offset)
             .addMemOperand(MMO);
 }
 
@@ -139,7 +158,9 @@
 inline const MachineInstrBuilder &
 addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI,
                          unsigned GlobalBaseReg = 0) {
-  return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0).addConstantPoolIndex(CPI);
+  //FIXME: factor this
+  return MIB.addReg(GlobalBaseReg).addImm(1).addReg(0)
+    .addConstantPoolIndex(CPI).addReg(0);
 }
 
 } // End llvm namespace