commit bcd2498f4f1682dbdc41452add5b9bc72cbd6b3f
author Bill Wendling <isanbard@gmail.com> Thu Dec 07 20:28:15 2006 +0000
committer Bill Wendling <isanbard@gmail.com> Thu Dec 07 20:28:15 2006 +0000
tree c42cc25e701e45736f384bfced29bdbdf66a65a8
parent 832171cb9724d2d31c8dfb73172e2be8f6dd13ee

Removed more <iostream> includes


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32321 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/TwoAddressInstructionPass.cpp

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 932542d..be19e46 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -41,7 +41,6 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
-#include <iostream>
 using namespace llvm;
 
 namespace {
@@ -102,7 +101,7 @@
 
         if (FirstTied) {
           ++NumTwoAddressInstrs;
-          DOUT << '\t'; DEBUG(mi->print(std::cerr, &TM));
+          DOUT << '\t'; DEBUG(mi->print(*cerr.stream(), &TM));
         }
         FirstTied = false;
 
@@ -195,7 +194,7 @@
           MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
 
           MachineBasicBlock::iterator prevMi = prior(mi);
-          DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(std::cerr, &TM));
+          DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(*cerr.stream(), &TM));
 
           // Update live variables for regA
           LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
@@ -220,7 +219,7 @@
         mi->getOperand(ti).setReg(mi->getOperand(si).getReg());
         MadeChange = true;
 
-        DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(std::cerr, &TM));
+        DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(*cerr.stream(), &TM));
       }
     }
   }