commit bd0879d7d9790e4bfa4bdcefd3abda0301e37bae
author Bill Wendling <isanbard@gmail.com> Thu May 29 01:02:09 2008 +0000
committer Bill Wendling <isanbard@gmail.com> Thu May 29 01:02:09 2008 +0000
tree e90f49e1f2c6334bdf77c69fc25f26ccd63aba3e
parent 3e93e630aa97893cb758b9300aa18552d07b9539

Implement "AsCheapAsAMove" for some obviously cheap instructions: xor and the
like.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@51662 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/TwoAddressInstructionPass.cpp

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 5f0a923..81864b7 100644
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -330,10 +330,13 @@
         InstructionRearranged:
           const TargetRegisterClass* rc = MF.getRegInfo().getRegClass(regA);
           MachineInstr *Orig = MRI->getVRegDef(regB);
+          const TargetInstrDesc &OrigTID = Orig->getDesc();
           bool SawStore = false;
 
           if (EnableReMat && Orig && Orig->isSafeToMove(TII, SawStore) &&
-              TII->isTriviallyReMaterializable(Orig)) {
+              OrigTID.isAsCheapAsAMove() && !OrigTID.mayLoad() &&
+              !OrigTID.isSimpleLoad()) {
+            DEBUG(cerr << "2addr: REMATTING : " << *Orig << "\n");
             TII->reMaterialize(*mbbi, mi, regA, Orig);
             ReMattedInstrs.insert(Orig);
           } else {