llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.
This adds location info for all llvm_unreachable calls (which is a macro now) in
!NDEBUG builds.
In NDEBUG builds location info and the message is off (it only prints
"UREACHABLE executed").
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75640 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PIC16/PIC16.h b/lib/Target/PIC16/PIC16.h
index 6af4664..3b6fcee 100644
--- a/lib/Target/PIC16/PIC16.h
+++ b/lib/Target/PIC16/PIC16.h
@@ -308,7 +308,7 @@
inline static const char *PIC16CondCodeToString(PIC16CC::CondCodes CC) {
switch (CC) {
- default: LLVM_UNREACHABLE("Unknown condition code");
+ default: llvm_unreachable("Unknown condition code");
case PIC16CC::NE: return "ne";
case PIC16CC::EQ: return "eq";
case PIC16CC::LT: return "lt";
@@ -324,7 +324,7 @@
inline static bool isSignedComparison(PIC16CC::CondCodes CC) {
switch (CC) {
- default: LLVM_UNREACHABLE("Unknown condition code");
+ default: llvm_unreachable("Unknown condition code");
case PIC16CC::NE:
case PIC16CC::EQ:
case PIC16CC::LT:
diff --git a/lib/Target/PIC16/PIC16AsmPrinter.cpp b/lib/Target/PIC16/PIC16AsmPrinter.cpp
index d80476c..b6401df 100644
--- a/lib/Target/PIC16/PIC16AsmPrinter.cpp
+++ b/lib/Target/PIC16/PIC16AsmPrinter.cpp
@@ -128,7 +128,7 @@
if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
else
- LLVM_UNREACHABLE("not implemented");
+ llvm_unreachable("not implemented");
return;
case MachineOperand::MO_Immediate:
@@ -155,7 +155,7 @@
return;
default:
- LLVM_UNREACHABLE(" Operand type not supported.");
+ llvm_unreachable(" Operand type not supported.");
}
}
diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp
index c8c353f..9a3d704 100644
--- a/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -1228,7 +1228,7 @@
// return should have odd number of operands
if ((Op.getNumOperands() % 2) == 0 ) {
- LLVM_UNREACHABLE("Do not know how to return this many arguments!");
+ llvm_unreachable("Do not know how to return this many arguments!");
}
// Number of values to return
@@ -1697,7 +1697,7 @@
static PIC16CC::CondCodes IntCCToPIC16CC(ISD::CondCode CC) {
switch (CC) {
- default: LLVM_UNREACHABLE("Unknown condition code!");
+ default: llvm_unreachable("Unknown condition code!");
case ISD::SETNE: return PIC16CC::NE;
case ISD::SETEQ: return PIC16CC::EQ;
case ISD::SETGT: return PIC16CC::GT;
diff --git a/lib/Target/PIC16/PIC16InstrInfo.cpp b/lib/Target/PIC16/PIC16InstrInfo.cpp
index dad0266..cb0c41b 100644
--- a/lib/Target/PIC16/PIC16InstrInfo.cpp
+++ b/lib/Target/PIC16/PIC16InstrInfo.cpp
@@ -105,7 +105,7 @@
.addImm(1); // Emit banksel for it.
}
else
- LLVM_UNREACHABLE("Can't store this register to stack slot");
+ llvm_unreachable("Can't store this register to stack slot");
}
void PIC16InstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
@@ -145,7 +145,7 @@
.addImm(1); // Emit banksel for it.
}
else
- LLVM_UNREACHABLE("Can't load this register from stack slot");
+ llvm_unreachable("Can't load this register from stack slot");
}
bool PIC16InstrInfo::copyRegToReg (MachineBasicBlock &MBB,
diff --git a/lib/Target/PIC16/PIC16RegisterInfo.cpp b/lib/Target/PIC16/PIC16RegisterInfo.cpp
index bb4f278..bbdb353 100644
--- a/lib/Target/PIC16/PIC16RegisterInfo.cpp
+++ b/lib/Target/PIC16/PIC16RegisterInfo.cpp
@@ -65,17 +65,17 @@
int PIC16RegisterInfo::
getDwarfRegNum(unsigned RegNum, bool isEH) const {
- LLVM_UNREACHABLE("Not keeping track of debug information yet!!");
+ llvm_unreachable("Not keeping track of debug information yet!!");
return -1;
}
unsigned PIC16RegisterInfo::getFrameRegister(MachineFunction &MF) const {
- LLVM_UNREACHABLE("PIC16 Does not have any frame register");
+ llvm_unreachable("PIC16 Does not have any frame register");
return 0;
}
unsigned PIC16RegisterInfo::getRARegister() const {
- LLVM_UNREACHABLE("PIC16 Does not have any return address register");
+ llvm_unreachable("PIC16 Does not have any return address register");
return 0;
}