Fix a couple of bugs in permute/splat generate, thanks to Nate for actually
figuring these out! :)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26904 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelLowering.cpp b/lib/Target/PowerPC/PPCISelLowering.cpp
index ee41ed1..a50664d 100644
--- a/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -599,8 +599,6 @@
// Store the input value into Value#0 of the stack slot.
unsigned InSize = MVT::getSizeInBits(Op.getOperand(0).getValueType())/8;
- FIdx = DAG.getNode(ISD::ADD, MVT::i32, FIdx,
- DAG.getConstant(16-InSize, MVT::i32));
SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, DAG.getEntryNode(),
Op.getOperand(0), FIdx,DAG.getSrcValue(NULL));
return DAG.getNode(PPCISD::LVE_X, Op.getValueType(), Store, FIdx,
diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td
index 8af3e87..0eee148 100644
--- a/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/lib/Target/PowerPC/PPCInstrInfo.td
@@ -961,7 +961,7 @@
Requires<[FPContractions]>;
def VPERM : VAForm_1<43, (ops VRRC:$vD, VRRC:$vA, VRRC:$vB, VRRC:$vC),
- "vperm $vD, $vA, $vC, $vB", VecPerm,
+ "vperm $vD, $vA, $vB, $vC", VecPerm,
[(set VRRC:$vD,
(PPCvperm (v4f32 VRRC:$vA), VRRC:$vB, VRRC:$vC))]>;