add a fixme: ir isn't expressive enough.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123139 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Analysis/ScalarEvolution.cpp b/lib/Analysis/ScalarEvolution.cpp
index 0c16bbc..922751f 100644
--- a/lib/Analysis/ScalarEvolution.cpp
+++ b/lib/Analysis/ScalarEvolution.cpp
@@ -4863,6 +4863,7 @@
// the stride is. As such, NUW addrec's will always become zero in
// "start / -stride" steps, and we know that the division is exact.
if (AddRec->hasNoUnsignedWrap())
+ // FIXME: We really want an "isexact" bit for udiv.
return getUDivExpr(Start, getNegativeSCEV(Step));
// For now we handle only constant steps.