When the allocator rewrite a spill register with new virtual register, it replaces other operands of the same register. Watch out for situations where
only some of the operands are sub-register uses.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43776 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp
index 9301c28..929b1e7 100644
--- a/lib/CodeGen/LiveIntervalAnalysis.cpp
+++ b/lib/CodeGen/LiveIntervalAnalysis.cpp
@@ -379,10 +379,19 @@
if (!MI->getOperand(j).isRegister())
continue;
unsigned RegJ = MI->getOperand(j).getReg();
- if (RegJ != 0 && MRegisterInfo::isVirtualRegister(RegJ) &&
- RegMap->isSubRegister(RegJ))
+ if (RegJ == 0 || MRegisterInfo::isPhysicalRegister(RegJ))
+ continue;
+ bool isSubRegJ = RegMap->isSubRegister(RegJ);
+ if (isSubRegJ) {
+ assert(!isSubReg || RegMap->getSubRegisterIndex(RegJ) == SubIdx);
RegJ = RegMap->getSuperRegister(RegJ);
- if (RegJ == li.reg) {
+ }
+ // Important to check "isSubRegJ == isSubReg".
+ // e.g. %reg1024 = MOVSX32rr16 %reg1025. It's possible that both
+ // registers are coalesced to the same register but only %reg1025 is
+ // a sub-register use. They should not be rewritten to the same
+ // register.
+ if (RegJ == li.reg && isSubRegJ == isSubReg) {
MI->getOperand(j).setReg(NewVReg);
HasUse |= MI->getOperand(j).isUse();
HasDef |= MI->getOperand(j).isDef();