fixed incorrect lowering of ISD::SUB node. SUB has only one result value.
It wasn't caught during tests because we never got a sub generated, (i8 was always getting promoted to int, which in turn was broken into subc/sube). Though the optimizer leaves an i8 sub now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77178 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp
index 8f59512..5949b7b 100644
--- a/lib/Target/PIC16/PIC16ISelLowering.cpp
+++ b/lib/Target/PIC16/PIC16ISelLowering.cpp
@@ -1573,11 +1573,20 @@
SDValue NewVal = ConvertToMemOperand (Op.getOperand(0), DAG, dl);
SDVTList Tys = DAG.getVTList(MVT::i8, MVT::Flag);
- if (Op.getOpcode() == ISD::SUBE)
- return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1),
- Op.getOperand(2));
- else
- return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
+ switch (Op.getOpcode()) {
+ case ISD::SUBE:
+ return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1),
+ Op.getOperand(2));
+ break;
+ case ISD::SUBC:
+ return DAG.getNode(Op.getOpcode(), dl, Tys, NewVal, Op.getOperand(1));
+ break;
+ case ISD::SUB:
+ return DAG.getNode(Op.getOpcode(), dl, MVT::i8, NewVal, Op.getOperand(1));
+ break;
+ default:
+ assert (0 && "Opcode unknown.");
+ }
}
void PIC16TargetLowering::InitReservedFrameCount(const Function *F) {