commit | c004eec71b49ae13ee4d9f859c61cdb9ed092b22 | [log] [tgz] |
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author | Owen Anderson <resistor@mac.com> | Tue Sep 21 18:41:19 2010 +0000 |
committer | Owen Anderson <resistor@mac.com> | Tue Sep 21 18:41:19 2010 +0000 |
tree | 23a74efbf817f08bb796242ade0c68d03bf68c17 | |
parent | 89bfef003ec71792d078d489566655006b89bc43 [diff] |
When adding the carry bit to another value on X86, exploit the fact that the carry-materialization (sbbl x, x) sets the registers to 0 or ~0. Combined with two's complement arithmetic, we can fold the intermediate AND and the ADD into a single SUB. This fixes <rdar://problem/8449754>. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114460 91177308-0d34-0410-b5e6-96231b3b80d8