Change MachineInstr ctor's to take a TargetInstrDescriptor reference instead
of opcode and number of operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMMul.cpp b/lib/Target/ARM/ARMMul.cpp
index 474039d..c4eeaac 100644
--- a/lib/Target/ARM/ARMMul.cpp
+++ b/lib/Target/ARM/ARMMul.cpp
@@ -16,6 +16,8 @@
#include "ARM.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Support/Compiler.h"
using namespace llvm;
@@ -60,8 +62,8 @@
RsOp.setReg(Rm);
} else {
unsigned scratch = Op == ARM::MUL ? ARM::R12 : ARM::R0;
- BuildMI(MBB, I, ARM::MOV, 3, scratch).addReg(Rm).addImm(0)
- .addImm(ARMShift::LSL);
+ BuildMI(MBB, I, MF.getTarget().getInstrInfo()->get(ARM::MOV),
+ scratch).addReg(Rm).addImm(0).addImm(ARMShift::LSL);
RmOp.setReg(scratch);
}
}