Apply a patch by Micah Villmow to fix AsmParser to accept vector
shift constant expressions, and add support for folding vector
shift constant expressions. This fixes PR3802.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@67010 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/test/Assembler/vector-shift.ll b/test/Assembler/vector-shift.ll
index 3b2c07c..1850e66 100644
--- a/test/Assembler/vector-shift.ll
+++ b/test/Assembler/vector-shift.ll
@@ -1,6 +1,6 @@
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr
-; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep shl | count 1
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep ashr | count 1
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | grep lshr | count 1
define <4 x i32> @foo(<4 x i32> %a, <4 x i32> %b) nounwind {
entry:
@@ -19,3 +19,14 @@
%cmp = ashr <4 x i32> %a, %b ; <4 x i32> [#uses=1]
ret <4 x i32> %cmp
}
+
+; Constant expressions: these should be folded.
+define <2 x i64> @foo_ce() nounwind {
+ ret <2 x i64> shl (<2 x i64> <i64 5, i64 6>, <2 x i64> <i64 3, i64 5>)
+}
+define <2 x i64> @bar_ce() nounwind {
+ ret <2 x i64> lshr (<2 x i64> <i64 340, i64 380>, <2 x i64> <i64 3, i64 5>)
+}
+define <2 x i64> @baz_ce() nounwind {
+ ret <2 x i64> ashr (<2 x i64> <i64 573, i64 411>, <2 x i64> <i64 3, i64 5>)
+}