commit c1a62834a2ad33a80ca2b1f3a549f4f7806cd320
author Venkatraman Govindaraju <venkatra@cs.wisc.edu> Sun Jan 16 03:15:11 2011 +0000
committer Venkatraman Govindaraju <venkatra@cs.wisc.edu> Sun Jan 16 03:15:11 2011 +0000
tree 2a7de945c8823a7ca63200af88b2b378d31dc20c
parent 9cd3da47f9d67d345a94dddf85fcbb3ff2dd7200

Implement AnalyzeBranch in Sparc Backend.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123561 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Sparc/SparcInstrInfo.h

diff --git a/lib/Target/Sparc/SparcInstrInfo.h b/lib/Target/Sparc/SparcInstrInfo.h
index c00bd21..b2d24f5 100644
--- a/lib/Target/Sparc/SparcInstrInfo.h
+++ b/lib/Target/Sparc/SparcInstrInfo.h
@@ -58,8 +58,15 @@
   /// any side effects other than storing to the stack slot.
   virtual unsigned isStoreToStackSlot(const MachineInstr *MI,
                                       int &FrameIndex) const;
-  
-  
+
+
+  virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
+                             MachineBasicBlock *&FBB,
+                             SmallVectorImpl<MachineOperand> &Cond,
+                             bool AllowModify = false) const ;
+
+  virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const;
+
   virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
                                 MachineBasicBlock *FBB,
                                 const SmallVectorImpl<MachineOperand> &Cond,