Name change for consistency. No functional change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@93480 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 7c87448..7b62c00 100644
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -3143,7 +3143,7 @@
const TargetInstrInfo *TII = getTargetMachine().getInstrInfo();
const BasicBlock *LLVM_BB = BB->getBasicBlock();
- MachineFunction *F = BB->getParent();
+ MachineFunction *MF = BB->getParent();
MachineFunction::iterator It = BB;
++It;
@@ -3170,13 +3170,13 @@
break;
}
- MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
- MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
- F->insert(It, loopMBB);
- F->insert(It, exitMBB);
+ MachineBasicBlock *loopMBB = MF->CreateMachineBasicBlock(LLVM_BB);
+ MachineBasicBlock *exitMBB = MF->CreateMachineBasicBlock(LLVM_BB);
+ MF->insert(It, loopMBB);
+ MF->insert(It, exitMBB);
exitMBB->transferSuccessors(BB);
- MachineRegisterInfo &RegInfo = F->getRegInfo();
+ MachineRegisterInfo &RegInfo = MF->getRegInfo();
unsigned scratch = RegInfo.createVirtualRegister(ARM::GPRRegisterClass);
unsigned scratch2 = (!BinOpcode) ? incr :
RegInfo.createVirtualRegister(ARM::GPRRegisterClass);
@@ -3219,7 +3219,7 @@
// ...
BB = exitMBB;
- F->DeleteMachineInstr(MI); // The instruction is gone now.
+ MF->DeleteMachineInstr(MI); // The instruction is gone now.
return BB;
}