Fix the Sparc backend with Evan's recent tblgen changes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26009 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
index 4ca0176..6c0e0b2 100644
--- a/lib/Target/Sparc/SparcISelDAGToDAG.cpp
+++ b/lib/Target/Sparc/SparcISelDAGToDAG.cpp
@@ -983,24 +983,24 @@
// Constant offset from frame ref.
Base = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i32);
} else {
- Base = Select(Addr.getOperand(0));
+ Base = Addr.getOperand(0);
}
Offset = CurDAG->getTargetConstant(CN->getValue(), MVT::i32);
return true;
}
}
if (Addr.getOperand(0).getOpcode() == SPISD::Lo) {
- Base = Select(Addr.getOperand(1));
+ Base = Addr.getOperand(1);
Offset = Addr.getOperand(0).getOperand(0);
return true;
}
if (Addr.getOperand(1).getOpcode() == SPISD::Lo) {
- Base = Select(Addr.getOperand(0));
+ Base = Addr.getOperand(0);
Offset = Addr.getOperand(1).getOperand(0);
return true;
}
}
- Base = Select(Addr);
+ Base = Addr;
Offset = CurDAG->getTargetConstant(0, MVT::i32);
return true;
}
@@ -1015,12 +1015,12 @@
if (Addr.getOperand(0).getOpcode() == SPISD::Lo ||
Addr.getOperand(1).getOpcode() == SPISD::Lo)
return false; // Let the reg+imm pattern catch this!
- R1 = Select(Addr.getOperand(0));
- R2 = Select(Addr.getOperand(1));
+ R1 = Addr.getOperand(0);
+ R2 = Addr.getOperand(1);
return true;
}
- R1 = Select(Addr);
+ R1 = Addr;
R2 = CurDAG->getRegister(SP::G0, MVT::i32);
return true;
}