ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand. Thanks to Bob for pointing this out!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@68734 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index d3b2e9a..a227f25 100644
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -698,7 +698,7 @@
if (getOpcode() == TargetInstrInfo::INLINEASM) {
assert(DefOpIdx >= 2);
const MachineOperand &MO = getOperand(DefOpIdx);
- if (!MO.isReg() || !MO.isDef())
+ if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
return false;
// Determine the actual operand no corresponding to this index.
unsigned DefNo = 0;