commit c391d16b498ff7401d815c72154f4ced1d6e212c
author Rafael Espindola <rafael.espindola@gmail.com> Mon Oct 23 20:34:27 2006 +0000
committer Rafael Espindola <rafael.espindola@gmail.com> Mon Oct 23 20:34:27 2006 +0000
tree 6850429b04016d0dfb87e19b12803cc1f83b3f51
parent d8ed7f8cde5e56eff4692303af97aa6495c41ca4

implement STRB and STRH


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31138 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARMInstrInfo.td

diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td
index 37ec360..816970f 100644
--- a/lib/Target/ARM/ARMInstrInfo.td
+++ b/lib/Target/ARM/ARMInstrInfo.td
@@ -184,6 +184,14 @@
                     "str $src, $addr",
                     [(store IntRegs:$src, iaddr:$addr)]>;
 
+def STRB    : InstARM<(ops IntRegs:$src, IntRegs:$addr),
+                       "strb $src, [$addr]",
+                       [(truncstorei8 IntRegs:$src, IntRegs:$addr)]>;
+
+def STRH    : InstARM<(ops IntRegs:$src, IntRegs:$addr),
+                       "strh $src, [$addr]",
+                       [(truncstorei16 IntRegs:$src, IntRegs:$addr)]>;
+
 def MOV   : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
                     "mov $dst, $src", [(set IntRegs:$dst, addr_mode1:$src)]>;