commit c3e2db407eee81631ccfbc4bec95f0b631f48fff
author Nate Begeman <natebegeman@mac.com> Mon Apr 04 09:09:00 2005 +0000
committer Nate Begeman <natebegeman@mac.com> Mon Apr 04 09:09:00 2005 +0000
tree c50bbf80fcb2101bfa9c47b3ce3b84666548ea0b
parent e584668f04723777e5c17292ddf7c1098c94fc71

i1 loads should also be from the low byte of the argument word.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21077 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/PowerPC/PPCISelPattern.cpp

diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp
index 7066b40..8751f42 100644
--- a/lib/Target/PowerPC/PPCISelPattern.cpp
+++ b/lib/Target/PowerPC/PPCISelPattern.cpp
@@ -173,7 +173,7 @@
     // that we ran out of physical registers of the appropriate type 
     if (needsLoad) {
       unsigned SubregOffset = 0;
-      if (ObjectVT == MVT::i8)  SubregOffset = 3;
+      if (ObjectVT == MVT::i8 || ObjectVT == MVT::i1) SubregOffset = 3;
       if (ObjectVT == MVT::i16) SubregOffset = 2;
       int FI = MFI->CreateFixedObject(ObjSize, ArgOffset);
       SDOperand FIN = DAG.getFrameIndex(FI, MVT::i32);