Added getTargetLowering() to TargetMachine. Refactored targets to support this.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26742 91177308-0d34-0410-b5e6-96231b3b80d8
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 0288143..991b088 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -42,8 +42,9 @@
PPCTargetLowering PPCLowering;
unsigned GlobalBaseReg;
public:
- PPCDAGToDAGISel(TargetMachine &TM)
- : SelectionDAGISel(PPCLowering), PPCLowering(TM) {}
+ PPCDAGToDAGISel(PPCTargetMachine &TM)
+ : SelectionDAGISel(PPCLowering),
+ PPCLowering(*TM.getTargetLowering()){}
virtual bool runOnFunction(Function &Fn) {
// Make sure we re-emit a set of the global base reg if necessary
@@ -1140,7 +1141,7 @@
/// createPPCISelDag - This pass converts a legalized DAG into a
/// PowerPC-specific DAG, ready for instruction scheduling.
///
-FunctionPass *llvm::createPPCISelDag(TargetMachine &TM) {
+FunctionPass *llvm::createPPCISelDag(PPCTargetMachine &TM) {
return new PPCDAGToDAGISel(TM);
}